News Legendary video game developer imagines a future where GPUs don't need PCs — John Carmack envisions a GPU with Linux onboard, so you would just add...

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He is describing something that doesn't fully exist, at least not yet.

A gpu with expandable direct storage.

Plus it would be upgradable because rip up current gpu designs, and add oodles of slots for memory and disks. And eliminate the OS. overhead altogether.

You still need a PCIe bus. Just because it doesn't have a removable connector that doesn't mean it isn't there. How do you think M.2 SSDs are connected to the CPU or motherboard chipset? They use a PCIe bus. Even integrated GPUs are done ted to the CPU using PCIe or similar.

So what you want is to switch to non modular systems where you buy it and that is it, when you want to upgrade you need to replace the whole thing? Basically the apple approach.
If describing
 
they added a library for the GPU to use network by a network card on PCI-E. It is used in super calculators to inter connect GPU.
This isn't general-purpose networking, though. It's only used for shared-memory communication between nodes, not like a general-purpose TCP/IP stack.

One of the reason why SLI has been removed is because we can now do it with PCI-E without external bus. Games can be programmed to use multiples GPU but developpers doesn't bother.
It's not because SLI is obsolete, since their workstation cards still have it and derive significant benefit by using it vs. PCIe. It's more because games had largely stopped using it, so they pulled it from consumer cards to further segment the consumer vs. server/workstation markets.

More recents foraway like Direct Memory Access (the GPU can access RAM and NVME without the CPU) come from that.
GPUs have been able to access host memory since the old days of regular PCI. They could also talk to hard drives that way, too. As I mentioned, accessing storage requires the involvement of the CPU, because the GPU lacks a filesystem driver. PCIe also makes it a very tricky business to do this, because certain switches and chipsets segregate lanes in a way that the GPU can't necessarily route to them. So, DirectStorage actually goes through host memory.

If you want to see what's required for a GPU to directly access storage, read up on Nvidia's "GPU Direct" technology and pay close attention to all the requirements and limitations. CXL fixes a lot of this stuff, BTW.

This is basically what intended Intel Larrabee but the other way arround:
No, I don't think so. They just used x86 because developers were familiar with it and it had good tools support. Keep in mind that PCIe isn't cache coherent (unlike CXL), so it would've been really awkward to try and make the GPU to work just like another CPU.
 
Looks like he wants a GPGPU where a CPU-ish (tuned for MIMD flows) side shared the same address space and ISA as the GPU side (tuned for SIMD flows). Intel went there with the Larrabee, which became the Xeon Phi, which had some successes in HPC.
 
a GPGPU where a CPU-ish (tuned for MIMD flows) side shared the same address space and ISA as the GPU side (tuned for SIMD flows).
Think Silicon did this with RISC-V, where they built a RISC-V based GPU block that you could put in a SoC with other RISC-V cores. If they're connected via a cache-coherent fabric, then you could conceivably migrate threads back and forth between the GPU cluster and CPU cluster.

Intel went there with the Larrabee, which became the Xeon Phi, which had some successes in HPC.
Xeon Phi never had exactly the same ISA as its host, due to the first generation using a custom vector ISA extension and the second gen using some subsets of AVX-512 never implemented on CPUs. More important is the lack of cache coherence across PCIe. So, the way it actually worked is (when used as a PCIe accelerator card) it ran its own Linux kernel and the host CPU would just dispatch commands to it like you might interact with any other PCIe card. There was no migration of threads between the host CPU and a Xeon Phi PCIe card.

From what I've read by people who actually tried to use them for HPC, it was difficult to get good performance from even the later generations of Xeon Phi, which might be one of the reasons Intel cancelled it.
 
Pfft who does he think he is anyway!? Not like he's some kinda... Engine genius rocket scientist!

God I wish carmack would go back to id, work on idtech with the gang & kick unreal engine out out out for good
 
He is describing something that doesn't fully exist, at least not yet.

A gpu with expandable direct storage.

Plus it would be upgradable because rip up current gpu designs, and add oodles of slots for memory and disks. And eliminate the OS. overhead altogether.


If describing


Ahhh but it does exist.. tho I suppose it really depends on your definition of 'upgrade'. Is going from no storage to 1 drive an Upgrade?

That's just consumer, there are always neat things that can technically be done with enterprise kit
 
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Pfft who does he think he is anyway!? Not like he's some kinda... Engine genius rocket scientist!
Is that meant as a joke? Because he quite literally did build a rocket in an X-prize competition, like 15 years ago:


God I wish carmack would go back to id, work on idtech with the gang & kick unreal engine out out out for good
I think Zenimax slammed that door shut when they sued Oculus/Facebook for IP theft by Carmack, when he left to go work there.
 
So a SoGPU (System-on-GPU)? Some of you have oversimplified it or are off almost entirely. The closest thing to that today conceptually is a SoC, but those don't have dGPU's by definition or they would be dGPU's. He's talking about discrete-class GPU's, otherwise he'd be pretty much just describing a gaming console.

A big difference here is system memory being very close to the GPU die(s) and VRAM, so no need to go over the PCIe bus (or it would be a special version of it or simply make it much easier to push on to PCIe 6.0 and above where traces have to get shorter and shorter to maintain signal integrity). Local storage could have faster bus speeds as well.
 
So a SoGPU (System-on-GPU)? Some of you have oversimplified it or are off almost entirely.
I'd advise everyone who's interested in the matter to go back and look at exactly what Carmack said, because most of the article is just the author sort of running wild.

PCIe 6.0 and above where traces have to get shorter and shorter to maintain signal integrity).
Even for PCIe 5.0, I think it's standard for motherboards to use retimers. PCIe 6 doesn't increase the clock frequency and thus isn't harder to drive, but the PAM4 encoding it uses does make it more sensitive to noise. But, I'm not sure why you're even talking about PCIe 6, since you can pretty clearly see that even PCIe 4.0 x16 is barely a bottleneck for even the fastest GPUs:

"Even with the fastest CPU available for Intel, the GeForce RTX 4090 loses a negligible, inconsequential amount of performance in PCI-Express 4.0 x8 mode. Averaged across all tests, at the 4K Ultra HD resolution, the RTX 4090 clocks in just 2% slower than with Gen 4 x16. Surprisingly, the average difference is fairly constant across all resolutions"

https://www.techpowerup.com/review/...rformance-scaling-with-core-i9-13900k/31.html