Libre-SOC developers sent the first test ASIC to TSMC's manufacturing facilities.
Libre-SOC Releases First Non-IBM OpenPOWER Chip in Decade : Read more
Libre-SOC Releases First Non-IBM OpenPOWER Chip in Decade : Read more
And this is how "open hardware" should be. It's one thing to list your BOM but have all of the components still contain chips and other IP made with proprietary ISAs or implementations. It's another to be able to make something that you could take, tweak, and submit to a fab.Every component, from hardware design files, documentation, mailing lists to software, is open-sourced and designed to fit with the open-source spirit and ideas
You gotta walk before you can run my friend, as the need for performance and volume increases and theres a chip that will benefit from the lower node im sure they'll make the switch.I wish it was on GloFlo 12nm instead of TSMC 180nm.
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Did you even read the article? The architecture is only 130k logical gates in size, let's just assume 5(I know, I know not all logic gates requires that much transistor or uses that few transistor and that there are resistors etc but let's just assume 5 transistor) transistors per logic gate, 130k x 5 = 650k transistors. GloFo 12nm has a transistor density of 36Million Transistors in a single mm2, 650k Transistor is only ~2% of 36Million, so the 650k design would only use 2% of a millimeter, smaller than a speck of dustI wish it was on GloFlo 12nm instead of TSMC 180nm.
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