News Massive Dell blunder leaks Intel and Nvidia's mobile roadmaps — Nova Lake, Panther Lake CPUs and GENxx Nvidia GPUs listed

[Deleted member 2731765]

I'm somewhat surprised these are N3B since MTL was N5 and everything has indicated ARL will all have Xe rather than Xe2 graphics tiles. Perhaps it's just how Intel did their wafer buys though.

Yeah. The process node used is still a bit unclear to me, but my guess is that they plan to make the iGPU tile on TSMC N3 node, but mainly for the Arc Alchemist Xe-LPG+ graphics architecture variant, LPG PLUS.

Because, there has been some gossip regarding Arrow Lake's iGPU tiles lately.

There was an indication that the Arrow Lake-H parts will pack GT2 tier graphics based on the Arc Alchemist Xe-LPG+ graphics architecture, whereas the Arrow Lake-HX lineup will retain the existing Arc Xe-LPG iGPU as Meteor Lake.

The Arrow Lake-U CPUs should also sport the Arc Xe-LPG+ iGPU too, but the GT1 tier design only.

 

[TechyIT223]

Cool. Are these mobile chips now ready for shipping or these are just production samples?

 

[Deleted member 2731765]

Massive Dell blunder leaks Intel and Nvidia's mobile roadmaps — Nova Lake, Panther Lake CPUs and GENxx Nvidia GPUs listed

Can someone please edit the title and heading of this article, and remove the "Blunder" word from it ? Because it sounds very silly/awkward for a heading. As in if someone leaked the company's HIGHLY confidential internal data more like.

This was just a leak of a roadmap slide, which isn't detrimental to the company's rapport, IMO. It could also be outdated. Just my thoughts ! So don't get me wrong.

Cool. Are these mobile chips now ready for shipping or these are just production samples?

Of course, these cannot be the final silicon chips. Most likely early samples being sent for lab testing.

 

[TechyIT223]

Btw what is the performance expectation from arc LPG PLUS iGpu lineup? Is the architecture brand new?

 

[Deleted member 2731765]

Btw what is the performance expectation from arc LPG PLUS iGpu lineup? Is the architecture brand new?

The architecture is almost same, and I mean to say both Meteor Lake and Arrow Lake will retain the same functionality, but the greatest addition to Arrow Lake is that the LPG PLUS iGPU would be getting the XMX units (Xe Matrix Extensions), which are found on current discrete graphics chips.

Because of this new addition of these XMX units, Intel would be "rebranding" the iGPU to Xe-LPG Plus.

FYI, to conserve space on Meteor Lake chips, INTEL had to remove XMX units from the Xe-LPG Render Slices and moved to the traditional DP4a instruction set instead.

Proof that Xe-LPG PLUS exists !

https://translate.google.com/websit...mmit/27c8082e85e12df394244e3350caa83f76d04e54

According to the IGC patch, the EU configuration of the Arrow Lake GPU is basically the same as that of the Meteor Lake, but some new functions have been added, as well as modified.

// 1. Support both sources as ACC for FP MUL
     // 2. Support Src2 as ACC for FP MAD
     bool relaxedACCRestrictions3() const {
    -  return false;
    +  return ((getPlatform() == Xe_ARL || getPlatform() >= Xe2) &&
    +          !getOption(vISA_disableSrc2AccSub));
     }
+bool has64bundleSize2GRFPerBank() const { return getPlatform() == Xe_ARL; }

In the case of the Xe-HPG architecture , the XMX unit supports the data formats FP16/BF16/INT8/INT4/INT2, and I assume the same with the Arrow Lake-H GPUs as well.

Dot Product Accumulate Systolic (DPAS) instruction.

hasDPAS() Xe_ARL Xe_ARL DPAS
DPAS

bool hasDPAS() const {
      return getPlatform() >= Xe_XeHPSDV && getPlatform() != Xe_MTL;
    }

@@ -288,10 +290,36 @@ LatencyTableXe<PlatformGen::XE>::getDPASLatency(uint8_t repeatCount) const {
         default:
           return 32;
         }
    +  case Xe_ARL:
    +    switch (repeatCount) {
    +    case 1:
    +      return 21;
    +    case 2:
    +      return 22;
    +    case 8: {
    +      if (m_builder.has4DeepSystolic()) {
    +        return 32;
    +      }
    +      return 46;
    +    }
    +    default:
    +      return 22; // Conservative cycle
    +    }

 

[TechyIT223]

Wow awesome info... So XMX means Ray Tracing cores to play games or for some other purpose on mobile chips?? 🤔 Right?

Meant hardware level support? ,but I guess performance should still be weak on mobile chips

 

[thestryker]

Wow awesome info... So XMX means Ray Tracing cores to play games or for some other purpose on mobile chips?? 🤔 Right?

Meant hardware level support? ,but I guess performance should still be weak on mobile chips

I believe XMX at the consumer level is mostly for the accelerated upscaling there's an actual raytracing accelerator.

Here's some info on the MTL Xe implementation/raytracing: https://chipsandcheese.com/2024/04/15/raytracing-on-meteor-lakes-igpu/

 

[Deleted member 2731765]

Yeah. Also, XMX units can actually offer improved AI performance, in the form of XeSS AI-powered upscaling, which is designed to work with Intel's deep learning XMX cores, which are similar to the Tensor cores found in Nvidia GPUs,

Additionally, while the XeSS algorithm can leverage both the DP4a and XMX hardware capabilities of Xe GPUs, XMX offers much better results.

But there's more to this. Will get back with details.

 

[TechyIT223]

Guys i couldn't understand anything properly what was explained in the linked article. Too technical for me. 🙁

They talk about ray tracing but we can also use xess upscaling with XMX cores right ? I mean these will help in both cases?

 

[Deleted member 2731765]

Hey there, don't bother much about the tech details. Leave ray tracing aside for time being.

Just note that the XMX cores run an AI model to perform the XeSS upscaling, akin to machine learning. They’re similar to Nvidia’s RTX Tensor cores, and Intel says they provide the best quality with XeSS.

However, XeSS can also work without the XMX cores. Graphics cards that support DP4a instructions, useful for AI calculations, might also work.

XMX AI engines have 16 times the compute capabilities to complete AI inferencing operations when compared to traditional GPU vector units. So this can provide performance boosts in many productivity, gaming, and creator applications.

 

[TechyIT223]

Okay thanks for your input mm

 

[Deleted member 2731765]

News Alert !

Intel's Lunar Lake CPUs have entered the mass production stage at TSMC using their 3nm node (most likely N3B), and we can expect the first laptops around Q3 2024 timeline.

Intel (Intel) will start the conversion of the new and old NB platforms in the second half of the year as scheduled. It will launch the Lunar Lake and Arrow Lake series at the end of the third quarter and fourth quarter respectively. The biggest highlight is the first release of Compute Tile from TSMC. Finally, it has used the 3nm customized process technology that TSMC has deployed for a long time, and has recently begun production

via DigiTimes

A recent report from DigiTimes claims that Intel has taken up the vast majority of orders of the TSMC 3nm process node. Intel is using the TSMC 3 nm node for the compute tile of its upcoming Core Ultra 300 "Lunar Lake" processor.

Not only that, even Arrow Lake lineup will also utilize TSMC's process tech, by replacing Intel 20A node for TSMC's N3B node for certain tiles. The iGPU tiles for Arrow Lake and Lunar Lake are also going to leverage TSMC process nodes.