MIPS Introduces Code Compression Chips

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wildwell

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[citation][nom]lifelesspoet[/nom]Now my router can have even less memory. I actually hope it goes the other way and allows for more features.[/citation]

Exactly. We understand companies can manufacture electronics for less $$ but I want to know if this is going to compromise performance on anything.
 

cyborg28

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Exactly. We understand companies can manufacture electronics for less $$ but I want to know if this is going to compromise performance on anything.
"The new microMIPS ISA maintains 98 percent of MIPS32 performance while reducing code size by 35 percent"

I'm guessing the compromise is around 2%
 

zmanz

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[citation][nom]wildwell[/nom]Exactly. We understand companies can manufacture electronics for less $$ but I want to know if this is going to compromise performance on anything.[/citation]

"The new microMIPS ISA maintains 98 percent of MIPS32 performance while reducing code size by 35 percent"

It will bring only a very tiny drop in current performance but that's not what this is about. The fact it can deal with 32-bit logic in a 16-bit space means less die-space used. This results in lower heat emissions and a lower TDP. Perhaps the scalability is similar and the ability to get similar results from 64-bit computations on a 32-bit size yielding the same output frequency at ~98% efficiency... going back to the heat and TDP, it could allow for a vast increase in clockspeeds?

Just a thought.
 

lamorpa

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Um, 35% is a long way from 50%, more like 1/3 reduction instead of 1/2. 32bit to 22 bit, not 16. Besides, ROM is cheap and not power hungry or hot. This is non-news.
 
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