newbie question about why amd can't get ghz up?

[eden]

Ah, that puts it better. I had forgotten copper layers and copper interconnects were pretty much the same.

Actually this might be what the P4 needs, to be able to linearly beat the Athlon by a 2x ratio in clock speed at the same process. It has 6 layers. At 9 layers as the Tbred had, it could significantly rise to 4GHZ easily. Intel has the ability to pay for it anyways, if AMD could.

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[pIII_Man]

thank you...

yes eden i was taling about the pcb under the PGA...

I don't think copper and transistors mix too well...


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[castle]

It is true copper can kill transistors, and that's why they cannot touch each other directly. Between 1st copper layer (Metal 1) and transistors, tungsten contact plugs are used to connect them electrically.

 

[eden]

They are still however inside the chip itself and not on the die (anything around the core or island), correct?

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[pIII_Man]

Umm...

I am not processor expert...but the only use i see for copper in a cpu is to connect the pins to the core...other than that i just can't see why you would want an excellent conductor of electricity to be mixed with a semiconductor...it would defeat the purpose i would think...

However i am using logic and not knowledge...so if you have any ideas on what copper can do to help..i would be very interested...


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[castle]

Again, on P4 there are 6 layers of copper wires on the die - the 128mm2 piece of silicon - inside the chip package. They are used to connect those 55million transistors, route the signal, and eventually lead to 478 pins.
On Athlon, there are 7 Cu layers; on Palomino, there are 8; on Barton, there are 9.

 

[pIII_Man]

i relise that...

I just wanted to see what eden was thinking...thats all...


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[eden]

I too don't know much, but from the charts showing the layers, it seems it is all in the die, not the layer above the pins only. I've done a Science project on CPUs and had some silicon facts on how chips are made (Intel's website has a side that teaches students about it and the chemical background).

What you should know on base, is that the chip is not one flat surface, but a serie of many many others. I recall there were almost 200 layers during the production of the silicon at the fab, however I don't know if the copper layers are the real amount of layers.
What is sure, is that between layers and circuits lies the copper interconnection, which, logically, allows even smoother driving of electrons, and heat as well. Just look at the Athlon vs PIII at 0.18m.

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