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No. Honestly, how do you even look at the paper and come away with that interpretation?The original article author (or myself?) seem to have miss understood the jackhammer whitepaper. It's not about using FPGAs to enhance attacks but that FPGAs which contain a hard CPU themselves being susceptible to attacks. Interesting but today purely academic.
After years of development, FPGAs are finally making an appearance on multi-tenant cloud servers. These heterogeneous FPGA-CPU architectures break common assumptions about isolation and security boundaries. Since the FPGA and CPU architectures share hardware resources, a new class of vulnerabilities requires us to reassess the security and dependability of these platforms.
In this work, we analyze the memory and cache subsystem and study Rowhammer and cache attacks enabled on two proposed heterogeneous FPGA-CPU platforms by Intel: the Arria 10 GX with an integrated FPGA-CPU platform, and the Arria 10 GX PAC expansion card which connects the FPGA to the CPU via the PCIe interface. We show that while Intel PACs currently are immune to cache attacks from FPGA to CPU, the integrated platform is indeed vulnerable to Prime and Probe style attacks from the FPGA to the CPU’s last level cache. Further, we demonstrate JackHammer, a novel and efficient Rowhammer from the FPGA to the host’s main memory.
The integrated Intel Arria 10 is based on a prototype E5- 2600v4 CPU with 12 physical cores. The prototype CPU has a Broadwell architecture in which the last level cache (LLC) is inclusive of the L1/L2 caches. The CPU package has an integrated Arria 10 GX 1150 FPGA running at 400 MHz.