P4 will scale above 10GHz

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Sojourn

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Intel's CMOS breakthrough only proves that the physics of silicone IC operation do not change at such small scales. There have been worries that circuitry on such a small scale would 'leak' signals, preventing it from functioning. Intel built a device at this scale and proved that there is no greater leakage than at current scales. It does not address the issue of fabrication, and so does not mean they will be able to manufacture ICs at this scale in any kind of production volume. It was Intel asking, "If we build it this small, will it function." To which the answer is yes. Now they have to answer, "How can we build it this small."

Also, you left out an important dimension in your performance equation. Performance = (clock x IPC)/pipeline. Take a theoretical CPU with 10 IPC at 10Hz, but it takes 5 cycles for an instruction to be completed because of a deep pipeline. If you take another CPU with 12IPC at 8Hz, but with a 3 cycle latency, you'd have the potential to process fewer instructions per second, but will win most real world benchmarks because a computer depends on the timeliness of the data as much as it depends on the quantity. Of course, this is an over simplification of an overly simplified analogy of a very complicated process, but it does address the core reason the P4 loses to the Athlon in so many benchmarks.

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Raystonn

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Sorry, but that equation doesn't hold up. Performance = (clock speed) x (average IPC). In the case of a branch misprediction, the IPC is temporarily reduced on a few instructions, thus lowering the 'average' IPC. Thus, this is already factored into the "average IPC" part of the equation.

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girish

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IPC is not reduced just in case of branch misprediction, but also data dependencies among subsequent instructions, even loops cause at least two branch mishits (one at entry and other at exit of the loop). However highly advanced, out of order execution does not hold good even for 10 sequential instructions in any kind of a program, and that P4 is already handling 20 instructions in different stages.
sojourn is right, deeper the pipelines, higher is the latency. and that reduces the average IPC, although strict calculations would show at such high speeds the variation is not integral, but of the order 2.95-3! thats not too big a deal, as it appears. but the latencies have a very bad effect on it. deeper pipelines do help in higher MHz, but not in higher IPC.

and thus, whatever this IPC or MHz, end result does not differ too much, increase in MHz (and number pipeline stages) is somewhat compensated by reduction in IPC.

and this is why a P4 looses to Athlon even when the MHz difference is as high as 300~450 MHz!

girish

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TheAntipop

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hehe

this debate about pipline length and latency vs. ipc is making me wonder: is the northwood gonna be anything but a shrunken p4 or is it gonna get a core update like the palamino is gonna be?

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girish

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northwood may not shrink the pipeline, it has to go higher MHz (sorry, GHz)
there are still more doubts as to how it would reach 10GHz and will it really perform like 10GHz, especially Athlon Palomino or Thoroughbred comes around at 8~9 GHz then and scares the hell out of 10G P4!

girish

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Grizely1

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I think the palomino's life will end at about 2-4GHz. The Hammer core (although we know almost nothing about it) will probably be the next large scaling core from AMD.

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girish

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I dont think so. palomino is debuting at 1.7 GHz I guess. it might go all the way to 5. and hammers are 64 bit, the next Athlon core is the Thoroughbred, which might take Athlon well past 8 GHz or even close to 10 GHz. Thoroughbred is 0.13 micron fab, so it should compete with the Northwood which is actually supposed to come alongwith Palomino. But one thing is for sure, with Brookdale that will allow pair SDRAM, and Plumas to pair DDR with P4 both Palomino and Thoroughbred will have a tough competition.

Get ready for the war.


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Grizely1

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Sorry but I don't agree. The Athlon wasn't designed to scale that high. Perhaps 5, but I don't think 8+.

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girish

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i am talking about newer cores. not physically upto 8, Palomino might take it upto 5 GHz. Thoroughbred will take it further. 8 was a guess, it might be 6~7... might even be 8+

while writing this i dont have the P4 hyperpipeline that could scale larger GHz in mind, I have the Palomino @ 1.7 GHz that was air-cooled, and that itself could actually be overclocked to 3+ GHz. with technology like this, it seems AMD already has the material to go 5 GHz. and Thouroughbred will be even better, and still better would be the Barton!

girish

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