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Archived from groups: comp.sys.ibm.pc.hardware.chips,comp.sys.intel,comp.arch (More info?)
In article <1084204646.576285@teapot.planet.gong>, roo@try-
removing-this.darkboong.demon.co.uk says...
> Andrew Reilly wrote:
> > On Sun, 09 May 2004 03:23:59 +0100, Rupert Pigott wrote:
> >
> >
> >>Andrew Reilly wrote:
> >>
> >>>On Fri, 07 May 2004 21:18:52 +0000, Sander Vesik wrote:
> >>>
> >>>
> >>>
> >>>>In comp.arch Del Cecchi <cecchinospam@us.ibm.com> wrote:
> >>>>
> >>>>>Is latency a big deal writing to a disk or graphics card?
> >>>>>
> >>>>
> >>>>It can easily be for a graphics card.
> >>>
> >>>
> >>>Why? Aren't they write-only devices? Surely any latency
> >>
> >>Off the top of my head, at least two requirements exist, namely
> >>screenshots and flyback sychronisation...
> >
> >
> > Both of which appear, on the surface, to be frame-rate type events: i.e.,
> > in the ballpark of the 10ms event time that I mentioned in the part that
> > you snipped. Not a latency issue on the order of memory access or
>
> Hmmm, how about querying the state of an OpenGL rendering pipeline
> that happens to be sitting on the graphics card ? I don't think that
> it's ever been true to say GFX cards are write only, and I'm not sure
> I'd ever want that.
Why wouldn't things be rendered in memory and then DMA'd to the
graphics card? Why would the processor *ever* care what's been
sent to the graphics subsystem? I'm from (close enough to)
Missouri, and you're going to have to show us, Rupert.
--
Keith
In article <1084204646.576285@teapot.planet.gong>, roo@try-
removing-this.darkboong.demon.co.uk says...
> Andrew Reilly wrote:
> > On Sun, 09 May 2004 03:23:59 +0100, Rupert Pigott wrote:
> >
> >
> >>Andrew Reilly wrote:
> >>
> >>>On Fri, 07 May 2004 21:18:52 +0000, Sander Vesik wrote:
> >>>
> >>>
> >>>
> >>>>In comp.arch Del Cecchi <cecchinospam@us.ibm.com> wrote:
> >>>>
> >>>>>Is latency a big deal writing to a disk or graphics card?
> >>>>>
> >>>>
> >>>>It can easily be for a graphics card.
> >>>
> >>>
> >>>Why? Aren't they write-only devices? Surely any latency
> >>
> >>Off the top of my head, at least two requirements exist, namely
> >>screenshots and flyback sychronisation...
> >
> >
> > Both of which appear, on the surface, to be frame-rate type events: i.e.,
> > in the ballpark of the 10ms event time that I mentioned in the part that
> > you snipped. Not a latency issue on the order of memory access or
>
> Hmmm, how about querying the state of an OpenGL rendering pipeline
> that happens to be sitting on the graphics card ? I don't think that
> it's ever been true to say GFX cards are write only, and I'm not sure
> I'd ever want that.

Why wouldn't things be rendered in memory and then DMA'd to the
graphics card? Why would the processor *ever* care what's been
sent to the graphics subsystem? I'm from (close enough to)
Missouri, and you're going to have to show us, Rupert.
--
Keith