ryman554 :
No, the SAME core points to a weird manufacturing flaw, since hte deisgn of all four cores are identical. Or at least they should be if they did it right. If the design indeed differs, I know of a root cause, and the fix isn't pretty.
Yeah, I'm thinking that
if the 3rd core is flawed, it's probably a run of B2s that had this problem during the lithography process, and they didn't catch that early enough, had them available as a quad core. Then they may have figured out the problem, and then disable it and turn it into a Phenom 8000 series.
Before I turn up the fanboyism, I would say that if they do knowingly sell bad quad cores, shame on them, and they should recall them if they want to salvage their reputation. It is a rather deceptive practice.
However, I don't think they're hiding behind the TLB bug. The TLB and "core 2 flaw" _is_ independent, and the BIOS fix (turning off the TLB) would not fix the core 2. People who can't run their Phenom 9000 series should RMA the chip. Whether they would cop to a problem... I don't know. IIRC Intel didn't really cop to the FDIV problem until publicly disclosed anyways, so if they don't cop to it until proven, well they would be doing no worse than Intel.
Now, I think that even the core 2 problem, requiring a downclock, isn't exactly a show breaker. I can hear the Intel fanboy sharpening knives now, but hear me out. With the latest Tom's article on what the Phenom 8000 series could be, there are plenty of benchmarks where the 3 core and 4 core scores are indistinguishable, or at least statistically insignificant. Majority of games aren't optimized beyond 2 cores anyways. This will only manifest as a problem when you use a properly multi-threaded app, and it's pegging all 4 cores.
Secondly, the core is
downclocked, not knocked out. This means that the cores are performing differently, and there are ongoing research on heterogeneous systems, where the cores perform differently (mind you "real" heterogeneous systems tend to perform differently due to different functional unit, etc etc). So, a scheduler could use the performance counters of the CPU, find out whichever process that's memory bound and stick that process on the slow core. These processes
will not suffer significantly because they tend to wait on memory anyway.
I know, cause I'm doing the graduate course on this type of research, and using a Phenom 9600 BE for simulating heterogeneous systems. When I'm done with it though, I'll probably tinker around with AOD to see whether this is the case.