News Phytium Claim New Generation CPU Core Can Rival Arm's Neoverse N2

[Admin]

Blacklisted Phytium rolls out new CPU architecture that can rival Arm's Neoverse N2 core designed for cloud and edge applications.

Phytium Claim New Generation CPU Core Can Rival Arm's Neoverse N2 : Read more

 

[bit_user]

So, it seems like these cores are implementing ARMv8-A.

Keeping in mind that this announcement is of the FTC870, here's what the original article says (via Google Translate):

"Originally, according to the plan, Feiteng would launch the Tengyun S5000 series based on the FTC860 self-developed core of the ARMv8.2 instruction set architecture in the third quarter of 2021, with up to 80 cores, 1MB of L1 cache per core, and 64MB of shared L3 cache. It supports eighth-channel DDR5-4800 memory, 64-channel PCIe5.0, dual-channel/four-channel parallel, etc., and its performance is said to be comparable to Intel Xeon Platinum 8280."
​

They didn't say anything about how this new core is expected to be used, nor what process node it's made on. They did mention that, in mid-2020, they were using 16 nm.

BTW, if anyone has more information on these benchmarks they ran, I'd be interested to hear it.

 

[jp7189]

So, it seems like these cores are implementing ARMv8-A.

Keeping in mind that this announcement is of the FTC870, here's what the original article says (via Google Translate):

​

"Originally, according to the plan, Feiteng would launch the Tengyun S5000 series based on the FTC860 self-developed core of the ARMv8.2 instruction set architecture in the third quarter of 2021, with up to 80 cores, 1MB of L1 cache per core, and 64MB of shared L3 cache. It supports eighth-channel DDR5-4800 memory, 64-channel PCIe5.0, dual-channel/four-channel parallel, etc., and its performance is said to be comparable to Intel Xeon Platinum 8280."​

​

They didn't say anything about how this new core is expected to be used, nor what process node it's made on. They did mention that, in mid-2020, they were using 16 nm.

BTW, if anyone has more information on these benchmarks they ran, I'd be interested to hear it.

1MB of L1 per core?! That would be 80MB L1 for the proposed CPU. They must mean L2.

 

[bit_user]

1MB of L1 per core?! That would be 80MB L1 for the proposed CPU. They must mean L2.

Yeah, agreed. Not only would the sizes make more sense, but it's also weird to jump straight from L1 to L3, saying nothing about L2. Plus, L1 cache is often segmented and not publicized as widely (but it's not hard to find stats on how big everyone's is).