RAM Timing: Is CAS Latency in READ command same as WRITE command?

[Amirreza Nasiri]

As far as I know and according to wikipedia about CAS Latency:

CL is the delay time between the moment a memory controller tells the memory module to access a particular memory column on a RAM module, and the moment the data from the given array location is available on the module's output pins.

So the definition above is about Read command which is sent from memory controller and ram module, returns the stored data on its output data. But what about Write command? is CAS Latency same? or memory timing about writing is completely different from reading?

 

[ingtar33]

CAS is not the same as writing speeds. that's a different value all together.

unless you need to know this for a test there isn't much you really need to know about this.

CAS or CL and the Ram Frequency are about the only number that REALLY affects ram performance
all the other numbers are mostly there for stability purposes, and only need adjustment for that reason. furthermore how they're adjusted is pretty formulaic when overclocking or stabilizing ram timings.

CL - (lowest number)
tRCD - either equal to CL or +1 or +2 over it
tRP - equal to CL or +1 or +2 over it (whatever is needed to stabilize the ram)
tRAS - equal to tRCD+(2*CL) + or - 1
CMD - this is determined mostly by the ram, that said T1 usually will give you a little better performance, while T2 typically will be more stable, sometimes you can change this and not effect ram stability. That said, the higher your ram is clocked the less likely it will be able to run T1.

As a result of testing you'll find what everyone else does eventually, which is that CAS and ram frequency really are the main two things that determine ram speeds. you can even do the math to determan what the latency timing is on your ram... take the ram frequency (the true frequency... for example ddr3 1333 will have a frequency of 1333/2 = 667, then take your CAS/ram frequency, so CAS 9 ddr3 1333 ram will have a latency of 13.4ns.

as to your more general question, i'm not 100% sure but i think write times are mostly affected by CL and tRAS like everything else... but it's "true" number is determined to be equal to tRCD+Trw (i think, i'm really stretching my brain on this one, it's been a while since i tried to parce up ram timings like this)

 

[Amirreza Nasiri]

CAS is not the same as writing speeds. that's a different value all together.
unless you need to know this for a test there isn't much you really need to know about this.

CAS or CL and the Ram Frequency are about the only number that REALLY affects ram performance
all the other numbers are mostly there for stability purposes, and only need adjustment for that reason. furthermore how they're adjusted is pretty formulaic when overclocking or stabilizing ram timings.
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First of all, Thank you for your fast reply, I thought that I couldn't get an answer here but I was wrong. I'm really confused about Read and Write command which are sent to the RAM and this is why I ask this question. but unfortunately I'm still confused.
I just want to know what happens in Writing process. I know what happens in Reading. Can you explain Writing process?

 

[ingtar33]

CAS is not the same as writing speeds. that's a different value all together.
unless you need to know this for a test there isn't much you really need to know about this.

CAS or CL and the Ram Frequency are about the only number that REALLY affects ram performance
all the other numbers are mostly there for stability purposes, and only need adjustment for that reason. furthermore how they're adjusted is pretty formulaic when overclocking or stabilizing ram timings.
.
.
.

First of all, Thank you for your fast reply, I thought that I couldn't get an answer here but I was wrong. I'm really confused about Read and Write command which are sent to the RAM and this is why I ask this question. but unfortunately I'm still confused.
I just want to know what happens in Writing process. I know what happens in Reading. Can you explain Writing process?

probably not to your satisfaction.

it might be easier if i explain what i know and you apply it to what you know. but i doubt i can explain it to your satisfaction.

when the cpu is writing back to the ram it stores the data in the CACHE. it stores the data in order, so first in first out is the order of the day. the data in the cache calls to the memory controller, the need to be written into the ram, the memory controller waits for the current read/write cycle to end and then schedules whatever is currently available for writing to the ram for that cycle.

Now this is where i get foggy on the process but i believe the settings that dictate write speeds and their order in the process are this

tRTW/tRWT- this is the write delay, how many cycles after a write command is received before the write is scheduled to occur~ once these number of cycles pass, we have to wait for the next
CAS - latency period, then we wait for
tRCD - this is the number of cycles we wait for read/write commands to execute after the CAS latency
tRW - these are the number of cycles for a write, and validation of a correct write

that should be the whole process. I don't really know enough about the inner workings and interactions between cores, cache and memory controller to really tell you much more.