Report: Specifications of Intel 100-Series Chipsets

[N.Broekhuijsen]

We're getting a pretty good picture of what the next generation of Intel hardware will look like.

Report: Specifications of Intel 100-Series Chipsets : Read more

 

[InvalidError]

Intel finally ditches DMI2.0 so they can ramp up chipset connectivity across the board; finally something genuinely new on the Intel chipset front.

BTW, I seriously doubt Skylake has "both" DDR3 and DDR4 controller: since there are practically no significant functional differences other than the trivial lower voltage, higher frequency and twice as many addressable banks per chip, Intel most likely simply extended their DDR3 controller to cover DDR4's operational range and accommodate those extra banks.

 

[CaedenV]

Finally looks like something that could potentially be a clear upgrade from my Sandy Bridge setup! Processors still are not significantly faster, but all of the added and newer connectivity is going to be difficult to say no to.

I am very curious to see what all the PCIe is going to be used for. 16 lanes for a 1x16 or 2x8 graphics setup only leaves 4 lanes available for SSDs and thunderbolt devices. That really is not a whole lot more connectivity made available.

Also, weren't we expecting PCIe4 to make an appearance with Skylake? I mean PCIe3 still have some legs on it for a graphical platform, but with more and more uses for PCIe you would imagine they would want to double the bandwidth again so that you can run more devices on a single lane rather than eating up 2-4 lanes a peace.

 

[Ninjawithagun]

Finally, a reason to upgrade?? Say it isn't so! Can't wait until next year....W00T!

 

[jasonelmore]

would have liked to see native usb 3.1 but with all those lanes i guess external controllers can get the job done.

 

[SirKnobsworth]

Intel finally ditches DMI2.0 so they can ramp up chipset connectivity across the board; finally something genuinely new on the Intel chipset front.

It would certainly be difficult to drive 20 PCIe 3.0 lanes off the current 20 Gbps interface. I wonder how much it will be upgraded...

I am very curious to see what all the PCIe is going to be used for. 16 lanes for a 1x16 or 2x8 graphics setup only leaves 4 lanes available for SSDs and thunderbolt devices. That really is not a whole lot more connectivity made available.

As the article states, those 20 lanes are in addition to the 16 primary lanes from the CPU which are the ones you want to use for graphics.

Also, weren't we expecting PCIe4 to make an appearance with Skylake? I mean PCIe3 still have some legs on it for a graphical platform, but with more and more uses for PCIe you would imagine they would want to double the bandwidth again so that you can run more devices on a single lane rather than eating up 2-4 lanes a peace.

According to rumors they dropped the PCIe 4.0 plans somewhere in the pipeline. It kinda makes sense if they're pushing a 2015 release date considering that the specification isn't even finished yet. It should come around in Cannonlake, but only for the CPU lanes, not on the chipset.

 

[InvalidError]

It would certainly be difficult to drive 20 PCIe 3.0 lanes off the current 20 Gbps interface. I wonder how much it will be upgraded...

They are apparently bumping the bit rate from 5Gbps/pair to 8Gbps/pair, which seems pretty slow considering the number of wired interfaces about to hit 20Gbps per pair. I was expecting a bump to at least 10Gbps per lane and maybe a bump from four lanes to five on top of that.

I guess they are only going for something like 8x8Gbps: enough to make most of that connectivity useful as long as you use it intermittently like a normal end-user usually would and not like something Intel would want you to buy a multi-socket server solution for just for the extra IO capacity.

 

[f-14]

i find your lack of reading & comprehension skills disturbing, be glad i am not lord vader!

"20 PCI-Express Gen 3.0 lanes. This is much more than what’s on the existing Z97 chipset, which has eight PCI-Express Gen 2.0 lanes. Note, these are PCI-Express lanes that go through the chipset, in addition to what the CPU is wired to."

Finally looks like something that could potentially be a clear upgrade from my Sandy Bridge setup! Processors still are not significantly faster, but all of the added and newer connectivity is going to be difficult to say no to.

I am very curious to see what all the PCIe is going to be used for. 16 lanes for a 1x16 or 2x8 graphics setup only leaves 4 lanes available for SSDs and thunderbolt devices. That really is not a whole lot more connectivity made available.

Also, weren't we expecting PCIe4 to make an appearance with Skylake? I mean PCIe3 still have some legs on it for a graphical platform, but with more and more uses for PCIe you would imagine they would want to double the bandwidth again so that you can run more devices on a single lane rather than eating up 2-4 lanes a peace.

 

[kristi_metal]

I was expecting a increase in the number of CPU PCI-X lanes. We will have only 16 lanes, it means Intel keeps the separation between mainstream cpus and High end desktops, wich is sad.
But at least, the chipset will have support for more connectivity and i am thinking of Sata Express for SSDs.

 

[Haravikk]

I'm a bit sketchy on some of this article's details; it says the Broadwell lifecycle will be very short, but isn't still pretty badly delayed? As I understood it, the desktop parts won't arrive till July 2015, so I very much doubt that Skylake is arriving in the second quarter, as there'd be no point in releasing Broadwell in that case. Also, has it been confirmed that Broadwell is socket 1150 compatible? Will it work with 8-series chipsets such as Q87?

 

[InvalidError]

i find your lack of reading & comprehension skills disturbing, be glad i am not lord vader!

Yes, I did read all that extra connectivity right. What I'm saying is I do not think Intel upgraded the DMI anywhere near as much to match; merely enough so that it should not become an imminent bottleneck under average desktop use.

With such a gross mismatch between DMI3.0 and the apparent connectivity on 100-series chipsets, there obviously is something else going on. Notice how the number of ports on any of the 5+Gbps interfaces are listed as "Up to N" ? I would not be surprised if the "Up to 20 lanes" for PCIe 3.0 includes a bunch more flex-IO lanes that can also be configured for either USB or SATA like Intel did with the 9x series.

A combined total of 20 lanes worth of 3rd-gen connectivity does not sound so impressive anymore. The relatively modest bump in DMI3.0 bandwidth makes much more sense in this context.

 

[InvalidError]

I'm a bit sketchy on some of this article's details; it says the Broadwell lifecycle will be very short, but isn't still pretty badly delayed? As I understood it, the desktop parts won't arrive till July 2015

This is assuming Broadwell-K launches at all.

Intel said many times that Broadwell was primarily intended for mobile and embedded applications so I would not be surprised if they canned Broadwell-K if Skylake remains on-track - no point in launching a chip that was not part of their original desktop plans when the parts that were are ready or just about.

 

[SoupRice]

So chrismas would be the time. i7's drop it's price??

 

[SoupRice]

So chrismas would be the time. i7's drop it's price??

 

[InvalidError]

So chrismas would be the time. i7's drop it's price??

Intel has not dropped prices on it chips by any significant amount in something like six years.

Instead of dropping prices, they will simply discontinue older models to consolidate most of their past lineup under a handful of SKUs for the remainder of their market life as they slot in new models in their current lineup.

 

[balance01]

It'll still cost 5 arms and 3 legs too!

 

[all stalked out]

I'm just gonna sit on z97 for a while, A cheaper six core as due on H-e is interesting but not really worth it at this time.