I've been kinda worried about all this secrecy surrounding Kepler. I've been looking forward to see nVidia's answer to Southern Islands. The lack of any talk may mean that nVidia's not quite too confident about what their answer is. I'm not thinking that "Kepler will fail," but rather, as others have suggested, that nVidia may pull a bait-and-switch and give us simply yet-another refreshed Fermi. Given how much of a leap SI is over the best Fermi has to offer, this would be a lose-lose proposition for all of us: nVidia's cards would fall way behind, and AMD's would have no reason to drop from their already-unprecedented (and exorbitant) prices; $549US is a steep price for a single-GPU card.
I'm hoping that this sudden move of the release means that nVidia actually has something good on their hands. At the very least, it should mean that we'll get our answers on just what they have in store soon enough.
[citation][nom]lord captivus[/nom]Nvidia, please dont rush it...I own a GTX 285, I allready have 512 bus![/citation]
In all honesty, there's no DIRECT matter betweeen whether it has a 512-bit, 256-bit, or 384-bit interface. A 512-bit interface is no more advanced than a narrower one, just of a greater scale: kind of like how two GPUs isn't necessarily more advanced than one.
This is the same deal over the Radeon 7970's question over memory type and interface width: both are just means to an end: making the interface wider, or taking more advanced (faster) memory chips are both a means of increasing a video card's memory bandwidth, and increasing the cost of production.
A reason why not everyone just makes arbitrarily wide memory interfaces is twofold: for one, as I've often said, it makes the PCB more complex, as each extra bit requires another pair of pins from the GPU, and the appropriate traces on the motherboard... This doesn't just make it harder to design a (larger, more expensive) board to fit it all, but it also further raises the price by requiring more RAM chips installed: remember that every 32-bits of interface means another chip.
The other reason is more technical: because of those extra pins, a memory interface also requires a specific amount of space along the edge of a GPU's die for all the leads to connect to. So that means that to get a memory interface of a certain width, the GPU's die area must pass a certain threshold. It's been pretty easy to correlate this relationship: with the GF206, there's been a strict boundary in die area where the width of the interface changes:
- less than 110 mm²: 64-bit
- 115-196 mm²: 128-bit.
- 196-368 mm²: 256-bit.
- 484-529 mm²: 384-bit. (G80, GF100, GF110)
- 470 mm², 576 mm²: 512-bit. (GT200b and GT200, respectively)
I know that the GT200b was a die-shrink of an existing chip, so it likely means that here, a 512-bit memory interface is unlikely unless the die is perhaps at least 550 mm² in size.
[citation][nom]sanadanosa[/nom]the mockup just for show you how fermi looks like. It's no problem at all.check out the pcwatch link and look at the demonstration. Do you think it's possible they use a mockup too?[/citation]
As I recall that event, the problem with the Fermi "fake" was that nVidia's own CEO declared that it was the real thing. Not once did nVidia back away from their obviously-incorrect claims. Showing a mock-up card as a demonstration of what the thing would look like is one thing, but it becomes problematic when the maker claims it's a REAL cards.
dragonsqrrl :
768 Cuda Cores
2GB 256-bit GDDR5 (high clocked, at least 160+ GBps bandwidth)... seems far more likely to me given the rumored memory capacity, especially if this isn't their high-end GPU.
or 2GB 512-bit GDDR5 (lower clocked, potentially much higher bandwidth... but, really Nvidia?)
I do agree, that 2GB on a 512-bit interface is highly unlikely; while 1-gitabit GDDR5 cells exist, I don't think they might see much use on such a high-end card, in lieu of the 2-gigabit ones as seen for the 7970.
As for that range of bandwidth on a 512-bit interface... the 2.0-3.0 GHz clock range for VRAM is kind of a wasteland: GDDR5 doesn't go that slow, and DDR3 doesn't go that high for video cards. (at least yet) GDDR3 has gotten as high as 2.48 GHz for the GTX 285, but I'd wager such cells cost considerably more than any DDR3 or slower GDDR3. Similarly, GDDR4 is the only thing that's filled the rest of that range, and the speed with which it was dropped indicates that it likely costs nearly as much as GDDR5.
dragonsqrrl :
Assuming the rumors are true, this seems reasonable, logical, and if clocked right, potentially very performance competitive with the HD7970. The big unknowns are transistor count/die size, power consumption, physical dimensions, and availability.
Well, knowing the (assumed) switch to the latest 28nm fabrication process, and a mere 50% increase in processing elements, I'd estimate a die size of around 400mm²; give or take. (probably closer to 380 for a 256-bit interface; up to 420-450 for a 384-bit one)
As for performance, if nVidia goes with lower memory bandwidth, I would honestly question how competitive it could be to the 7970; at that point the design, I think, may start becoming bottlenecked by its own memory bandwidth: nVidia's top-end cards have stood in the range of 160 GB/sec since the GTX 280. Given that 5.5 GHz appears to be the current ceiling for GDDR5, that means that 176 GB/sec would be the ceiling for 256-bit interfaces. This would likely be insufficient for such a power level; this was hinted at by AMD's unprecedented adoption of a 384-bit interface for Tahiti.
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