I'm not missing anything, to be honest. As Terry mentioned, if AMD wanted to include more than 16 cores into the same packaging that fits in AM5, then they need to slim down the cores (Zen4-dense) or increase the size of the CCD (effectively lowering the amount of CPUs/dies per waffer). Thinning out the cores won't be without a performance sacrifice and making the CCD fatter won't be free either; sacrifices will be made for either. As it stands, AMD found that 8-core CCDs is their perfect balance for what they need and this restriction makes it so that if they want to increase over 2 CCDs per package they need to get creative, much like Intel did wth bigLITTLE. I'd love to see 10 or even 12 core CCDs, but that is a redesign of the IF (interconnects), package size and even arrangement on it. I'd even be willing to say they'd need to modify a lot of tooling that just works now.
I guess another way of saying that is: the package size is limited. For AM5 AMD can only do 1 or 2 CCDs. For Server they can do up to... 16 I think? So that's how they can escale, but it also restricts them. Zen4-dense will try to do a bit of bigLITTLE without sacrificing too much and we'll have to wait and see if AMD will release that to consumer.
And yes, a single CCD, unless they have a very good contract for defects and such, I don't think it is very cost effective for them. But keep in mind, like I said, we do not know how their margins and costs look like. Given how they managed to price Ry3K very well, I'm sure they can get away with low-ish prices; or at least comparable to Intel bis-a-bis in the performance tiers. Assuming the overall platform cost is also comparable. We'll see how AMD positions Ry7K vs Alder/Raptor Lake in terms of platform cost, but I do believe AMD can go lower than what Intel would like still. Raptor Lake's die size is humongous, so each defect must hurt a lot (lost profit, kind of?) and they can still price the 12600K competitively. Well, at least reasonably XD
Regards.
Regarding alderlake die, well, they mostly just block out those defective cores and use them for low end series. It's a common practice.