Sorry Rambus lovers.

[FatBurger]

Oh, you're talking about pins on the chips themselves. I thought you were talking about on the RIMM/DIMM. No clue why. Sorry, that clears things up a bit.

So why doesn't Rambus just put in more pins, so that the RIMMs will have better bandwidth?
They're planning 32-bit RDRAM by 2003, but you say "Any low-grade engineer can come up with a design that extends the number of pins in order to increase bandwidth."

So why does it take them so long?



<font color=blue>Quarter pounder inside</font color=blue>
<font color=red>Change the Sig of the Week!!!</font color=red>

 

[Raystonn]

"they have been unable to increase the pin count"

Increasing pin count is a no-brainer design concept. It only takes time to implement, not a great deal of skill. All engineers know that 2 pins/wires/traces push more data than 1. SDRAM has had plenty of time to be tweaked. RDRAM has only recently entered into the mainstream market. It will eventually catch up on the pin count.


"Channels are traces in the mobo"

Right. I've been using the term 'pin' as everything from the pin on the memory chip through to the memory controller. It is these pins/traces/wires/etc that take up the real-estate on the motherboard. Using current memory technology, 4 channels of RDRAM (with 16 traces each) will take up the same real-estate as a single channel of SDRAM (with 64 traces.) In both cases we have the same hardware layout: 64 traces running from the memory to the memory controller. This layout will cost the case to implement in both cases. In one case you have PC800 RDRAM that would give you 6.4GB/s of bandwidth. In the other case you have PC2100 DDR SDRAM that would give you 2.1GB/s of bandwidth. If you a board with 64 traces/pins/etc on it, to which would you want to attach these traces? I think I'd prefer the 6.4GB/s over the 2.1GB/s.

-Raystonn


= The views stated herein are my personal views, and not necessarily the views of my employer. =

 

[Raystonn]

"Everybody else seems to prefer total bandwith" (sic)

Total bandwidth is the number of pins/traces multiplied by the amount of bandwidth each pin can carry. RDRAM provides superior bandwidth on a per-pin basis. If we were given the option of using the same number of pins/traces for whatever memory technology we desired, RDRAM would definately win out. For now we are stuck with a (PC800) 32-pin implementation (two channels). This still beats out the bandwidth of the (PC2100) 64-pin DDR SDRAM implementation, so the lack of pins at this time is not entirely critical.

-Raystonn


= The views stated herein are my personal views, and not necessarily the views of my employer. =

 

[Raystonn]

"So why does it take them so long?"

Perhaps they're not in so much of a rush. The total bandwidth of current 32-pin RDRAM designs (implemented with two channels) is greater than the total bandwidth provided by DDR SDRAM at this time. It's a wise business decision not to lay all your cards on the table immediately. Businesses should profit from the technology they have before immediately replacing it and making it obsolete.

-Raystonn


= The views stated herein are my personal views, and not necessarily the views of my employer. =

 

[FatBurger]

Agreed, but they need to move soon. Or hope that Intel wins the suit against Via that was announced today.



<font color=blue>Quarter pounder inside</font color=blue>
<font color=red>Change the Sig of the Week!!!</font color=red>

 

[Arbee]

Increasing pin count is a no-brainer design concept. It only takes time to implement, not a great deal of skill. All engineers know that 2 pins/wires/traces push more data than 1.

Sure. Likewise everybody knows that higher operating frequency increases bandwith. It doesn't take an engineer to see that. So lets increase the DDR SDRAM operating frequency from 166Mhz to 400MHz - and bring your beloved per pin bandwith of SDRAM to current RDRAM levels. Or even go to 533MHz or... easy ... mmmh, think not - maybe it is easier said than done.

BTW I thought PC2100 had 2.1GB/s bandwith, not 1.6GB/s.

And although it is easier to implement multiple channels with RDRAM than SDRAM, it is even easier to implement a single SDRAM channel than multiple RDRAM channels, due to the higher operating frequencies.


How terrible is wisdom when it brings no profit to the wise

 

[Arbee]

May I provide alternate explanations?
-maybe designing 32pin 400MHz parts isn't so easy after all;
-maybe it requires expensive modifications to the assembling lines and memory manufacturers aren't so keen;
-maybe it would require new chipsets and a probably future former partner isn't too keen in investing in this.

Some of the above? none?

Who knows? Rambus.

How terrible is wisdom when it brings no profit to the wise

 

[Arbee]

If we were given the option of using the same number of pins/traces for whatever memory technology we desired, RDRAM would definately win out.

Likewise, if we were given the option of using the same operating frequency for whatever memory technology we desired, SDRAM would definitely win out.

But we can't do either, can we? Yep, this is not a dreamland.


How terrible is wisdom when it brings no profit to the wise

 

[Arbee]

If we were given the option of using the same number of pins/traces for whatever memory technology we desired, RDRAM would definately win out.

Likewise, if we were given the option of using the same operating frequency for whatever memory technology we desired, SDRAM would definitely win out.

But we aren't given either of the options, are we? Yep, this is not a dreamland.


How terrible is wisdom when it brings no profit to the wise

 

[Arbee]

I'm wrinting in double...
My bad...

How terrible is wisdom when it brings no profit to the wise

 

[FatBurger]

If you start seeing in double, call a cab.



<font color=blue>Quarter pounder inside</font color=blue>
<font color=red>Change the Sig of the Week!!!</font color=red>

 

[Arbee]

lol

It is a new tech: DDW (double data writing)!


How terrible is wisdom when it brings no profit to the wise

 

[Raystonn]

"Likewise, if we were given the option of using the same operating frequency for whatever memory technology we desired, SDRAM would definitely win out."

Why is that? RDRAM has a greater operating frequency as well.

-Raystonn


= The views stated herein are my personal views, and not necessarily the views of my employer. =

 

[Arbee]

Precisely. Translating:

Raystonn, your argument was that if both techs (RDRAM and SDRAM) had the same number of pins (bus width) RDRAM would win because of its "superior pin bandwith" (a mere efect of the operating frequency and bytes per cycle, but anyway...).

I simply said that likewise if both techs had the same operating frequency (that would translate in similar "pin bandwith") SDRAM would win (because the bus is wider...more pins), just to show yours was a moot argument. (If if if...)

How terrible is wisdom when it brings no profit to the wise

 

[Raystonn]

The determination of how many memory pins/traces to have on your motherboard's chipset doesn't have much to do with the underlying memory technology. That is an independant decision. It need only be a multiple of the number available on a single module. More pins/traces can easily be added to give it the same number of pins as current SDRAM (SDR and DDR) chipsets simply by adding more channels. A four channel RDRAM implementation would have the same number of pins/traces as a single channel SDRAM (SDR or DDR) implementation and thus would take up the same amount of motherboard real-estate.

If you are going to compare memory technologies then you must do so in a way that separates it from those things imposed by the current chipsets that use it, such as the number of pins/traces. The only way to compare the underlying memory technologies is the delivered bandwidth per pin/trace. If you want to compare the platform as a whole then you compare a memory technology (bandwidth per pin/trace) together with a chipset (number of pins/traces provided.) You cannot however come to a conclusion on the quality of the memory technology alone by comparing both it and the chipset technology together. (One note though: Current RDRAM platforms as a whole also outperform current SDRAM [SDR or DDR] platforms as a whole. 3.2GB/s is greater than 2.1GB/s.)

-Raystonn


= The views stated herein are my personal views, and not necessarily the views of my employer. =

 

[mpjesse]

Whatever happened to that Rambus geek who always used to post non-sense? He was an ass...

-MP Jesse

"Signatures Still Suck"

 

[Arbee]

1 - the "pin bandwith"
The bandwidth per pin is just an intermediate value, as it is a mere function of frequency and bits per cycle. Back to basics:

Memory bandwith:<font color=white>_______</font color=white>PC2700<font color=white>_______</font color=white>PC800
(a) bits per signal<font color=white>__________</font color=white>1<font color=white>____________</font color=white>1
(b) signals per cycle<font color=white>________</font color=white>2<font color=white>____________</font color=white>2
(c) cycles per second<font color=white>_____</font color=white>166.6(6)M<font color=white>______</font color=white>400M (frequency)
(d)"Pin BW"(a)x(b)x(c)<font color=white>_____</font color=white>41.6(6)MBs<font color=white>____</font color=white>100MB/s (in bytes)
Bus width<font color=white>_______________</font color=white>64<font color=white>___________</font color=white>16
Total Bandwidth<font color=white>_________</font color=white>2.6(6)GB/s<font color=white>____</font color=white>1.6GB/s (per channel)

The only way to compare the underlying memory technologies is the delivered bandwidth per pin/trace.

Therefore, what you're really saying is that operating frequencies and bits per cycle is what matters. Sure they matter - the thing is that they are not "writen in stone" - in about four years SDRAM went from 7.5MB (PC66) to the above value.
Another issue is that the components are not completely independents - my guess is that (as an example) it is easier to increase the signals per cycle with lower than with higher operating frequencies. Likewise it is easier to implement larger buses with lower operating frequencies.

BTW - DDR SDRAM has lower latency than RDRAM.

2 - Now:
As I've been saying all along, RDRAM strong point is the higher operating frequency. SDRAM strong point is the larger bus width, although this makes it harder to implement multiple channels in the motherboards.

3 - The future:
Whether RDRAM will become the dominant memory technology in the future is something to be seen, but IMHO unless Rambus rapidly improves the actual product they will have an impossible task. It seems they will improve the product, but will they do it:
- fast enough?
- reducing manufaturing costs and market prices compared to todays RDRAM?

IMHO your claim that even a second grade engineer could implement a larger bus width in RDRAM is a bit insulting to the rambus engineers.

4 - Back to the issue - intel/rambus deal - history so far:

<b>-Has being RDRAM only hurt intel P4 sales or not?</b>. Yes.

<b>-<font color=blue>So far</font color=blue>, has RDRAM failed to live to the <font color=blue>initial</font color=blue> expectations of intel? </b>. Probably so - after all it hurt P4 sales

<b>-Is intel confortable being this dependent on a third party technology?</b>. Guess not...

To the above issue whether RDRAM is a better memory technology than SDRAM is quite irrelevant and besides the point because it is not a superior product at this moment.
----

5 - a final question

After P4 SDRAM based chipsets are out, which of the memory technologies will be prevalent in the P4 mobo sales? Gee - guess we'll see.


How terrible is wisdom when it brings no profit to the wise