ElMojoMikeo :
Although as the Motorola 68000 and its flat memory model was the much preferred from a programmers point of view. Intel won on shear numbers already out there. But the memory architecture held it back for years in the old 640K (1Mb) limits. It seemed every project I worked on then was fighting for memory!
Amigas used 68k, as did pre-PPC Macs and pre-SPARC Sun workstations.
Most people don't appreciate the awfulness of its segmented memory model. To access more than 64k you had to change the segment register. The way they achieved 20 bits of addressing was by (segment << 4) + offset, where segment and offset were both 16 bits. This lead to the invention of annoying "far" pointers and multiple heaps.
As a young programmer, I eagerly awaited Windows 95 and its promise of 32-bit segments (even 32-bit protected mode had memory segments, but they worked very differently). Particularly because my thing was graphics, and that had me smacking into 64k quite frequently
ElMojoMikeo :
The strange thing is that if you look at the processor registers inside a 8086 and the Latest Skylake processors. Apart from the size of the registers 8/16/32 and 64 bit, it all looks surprisingly the same given the massive progress that has been made.
Well, they added more general purpose registers in both the 32-bit and 64-bit extensions (not to mention the XMM/YMM regs), so there are quite a few more. But good 'ol ax, bx, cx, dx, sp, bp, si, and di (not to mention flags and the segment registers) are all still there.
But those are just the architectural registers. Under the hood, several times as many physical registers are used to hold their values:
https://en.wikipedia.org/wiki/Register_renaming
Skylake allegedly has 180 physical registers per core:
https://en.wikichip.org/wiki/intel/microarchitectures/skylake_(client)
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