[citation][nom]Ian Clark[/nom]IBM, MIPS, Sun SPARC, and others had 64-bits long ago, even the DEC Alpha, but where are they now? Dead from excessive license fees. They were all way beyond what ARM was clocked at, but the technology has little to do with the instruction set, so to say that ARM will not scale well against Intel is nonsense. The x86 ISA is poor compared to RISC, and AMD converted x86 instructions into mini RISCops some time back. The real success is the ecosystem. ARM will need to actually release their 64-bit instruction set before anyone will take them seriously. There will be so many ARM server suppliers that fragmentation will kill off many startups, but look at the financials, Intel makes a ton, while ARM gets 4 to 5c per core, admittedly in the billions of devices, but ARM servers will take a while to beat x86-64 motherboards on price.[/citation]
It's not as simple as you'd like it to be. ARM is not an architecture that can scale upwards in both power consumption and performance very well for a variety of reasons. I could look up exact reasons if you want me to, it's been a while and I don't remember them all off the top of my head.
Also, pretty much all x86 CPUs for years convert x86 instructions into RISC micro-code except for the Transmeta Cruose and its successor which used VLIW instead of RISC, if I remember correctly. Simply being RISC does not mean that it scales upwards. x86's RISC implementation, unlike ARM's, has different kinds of execution units that use differing code and is much more expandable. ARM is probably more like having a much small number of different execution units if even more than one for integer work and other stuff for FPU work, like I said, I'd have to refresh my memory of the specifics. Regardless of the why, ARM simple doesn't scale upwards in per core performance well. It might be able to make a decent GPU-like chip by having many cores, but per core performance simply doesn't scale upwards well. ARM would need an overhaul (not that it can't happen), if not an actual success, for it to be able to scale upwards in per core performance like the much higher power x86 CPUs such as i3s, i5s, i7s, Xeons, FX, Athlon IIS, Phenom IIs, Semprons, Opterons, et cetera.
One major drawback is that a RISC instruction set is simple. It doesn't have some more complex instructions that when made use of, can counter the performance impact of having a larger instruction set excellently, especially in high-power CPUs that make use of many types of complex code. RISC also needs more memory/cache because it lacks many complex instructions that would need to be carried out with several instructions instead of one instruction when they are lacked. This, if I remember correctly, was what made us turn ti CISC all those years ago rather than RISC because memory was very expensive.
One thing that ARM might be able to do well is, like you mentioned, highly parallel server work and for that, a 64 bit implementation could be quite the milestone. However, like those very powerful ten core Xeons, it would not be ideal for consumer computers.
Also, SPARC, MIPS, and several others are still in business. In fact, there are new Sparc CPUs coming out this or next year, if I remember correctly. IBM also designs CPUs for game consoles and such occasionally, so it's not like they're doing nothing either. MIPS is supposedly getting ready to unveil something this or next year too.
Like I've said before, a CPU engineer might be able to explain it better and correct any mistakes that I might have made (I work much more with GPUs and memory rather than CPUs), but I think that this is quite accurate.