I have quickly review part of the wikipedia article about MRAM and many statements are based on quite old (early 2000) research papers or powerpoints…
The below 2 articles from IMEC are much more uptodate (2021 and 2023) :
According to the eetimes article, VG-SOT-MRAM seems to have many of the requirements with less trade-offs than earlier MRAM generation (Toggle MRAM, STT MRAM)
What you refer as « Stop-clock logic« (I refer it as « Normally-off Computing ») is indeed what I really wish MRAM to enable and become the by default way that consumer devices are built : it would be disruptive.
But for that to happen, there is a need to find a high revenue niche (AI / ANN ?) to generate a boatload of cashflow/profit, that could then be re-invested to improve the MRAM manufacturing tools in order to further decrease MRAM costs : I hope that VG-SOT-MRAM could help kickstart this virtuous cycle…
The below 2 articles from IMEC are much more uptodate (2021 and 2023) :
According to the eetimes article, VG-SOT-MRAM seems to have many of the requirements with less trade-offs than earlier MRAM generation (Toggle MRAM, STT MRAM)
What you refer as « Stop-clock logic« (I refer it as « Normally-off Computing ») is indeed what I really wish MRAM to enable and become the by default way that consumer devices are built : it would be disruptive.
But for that to happen, there is a need to find a high revenue niche (AI / ANN ?) to generate a boatload of cashflow/profit, that could then be re-invested to improve the MRAM manufacturing tools in order to further decrease MRAM costs : I hope that VG-SOT-MRAM could help kickstart this virtuous cycle…
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