Wisecracker
Splendid
AID64/Everest might work as a backstop to Sandra.
It's not part of the progression/transition, doesn't fit, or is being left behind.
Just be patient Baby Steps
There is no frame buffer or VRAM. The Turks graphic cores represent the 3rd step in direct memory addressing - primarily for OpenCL, of course. HD Graphics (I think) are hung off the ring bus and share 'last level cache' prior to the memory controller. Turks has (as presumably Cape Verde GCN cores) DDR3 128-bit memory interface to a (2x64-bit) 128-bit memory controller.
Singles, not home runs!
If yah wanna go all (F)X Files on the memory, bandwidth, unified controller/address space, etc., if you want Cape Verdi massive clock 1125/4500MHz GDDR5-type 72GB/s GCN-cores bandwidth, you first sandwich 2xIMC into a 256-bit (4x64-bit) quad-channel memory controller. Like Interlagos, as a matter of fact (!). Even more interesting when looking at the Bulldozer FPU and how it will handle SIMD AVX instructions.
Then, it gets really interesting. A single stick of DDR4 2250 (a double-pumped 1125MHz) should handle 18 GB/s. Being that you have a quad-channel IMC and point-to-point DDR4 . . .
Yah got 72GB/s [:lutfij:4]
And? You want it, now? Since you asked nicely, here's some Fun With Slide 42 - Dual Graphics. . .
If OEMs don't build mobiles with Trinity G2 Dual Graphics, they can't be tested.
A Bad Day :
Add 256-512 MB of GDDR5: No competition for Trinty in GPU performance.
blazorthon :
... A big part of the IGP here is for it to manage in GPGPU workloads to make up for the inferior CPU performance compared to it's competition. Having 1GB instead of 512MB would help that...
blazorthon :
Maybe... However, I'm not sure. If AMD support it in Trinity's successor, then it's a recipe for diminishing the memory bandwidth bottleneck greatly. If the next APUs are 28nm with GCN cores, then it could be pretty important to have more memory bandwidth, even more so than it is today...
It's not part of the progression/transition, doesn't fit, or is being left behind.
Just be patient Baby Steps
There is no frame buffer or VRAM. The Turks graphic cores represent the 3rd step in direct memory addressing - primarily for OpenCL, of course. HD Graphics (I think) are hung off the ring bus and share 'last level cache' prior to the memory controller. Turks has (as presumably Cape Verde GCN cores) DDR3 128-bit memory interface to a (2x64-bit) 128-bit memory controller.
Singles, not home runs!
If yah wanna go all (F)X Files on the memory, bandwidth, unified controller/address space, etc., if you want Cape Verdi massive clock 1125/4500MHz GDDR5-type 72GB/s GCN-cores bandwidth, you first sandwich 2xIMC into a 256-bit (4x64-bit) quad-channel memory controller. Like Interlagos, as a matter of fact (!). Even more interesting when looking at the Bulldozer FPU and how it will handle SIMD AVX instructions.
Then, it gets really interesting. A single stick of DDR4 2250 (a double-pumped 1125MHz) should handle 18 GB/s. Being that you have a quad-channel IMC and point-to-point DDR4 . . .
Yah got 72GB/s [:lutfij:4]
bobafert :
not interested in what AMD writes in their press breifs. I want to see the numbers. I read the article and saw all the charts and I want more.
And? You want it, now? Since you asked nicely, here's some Fun With Slide 42 - Dual Graphics. . .
If OEMs don't build mobiles with Trinity G2 Dual Graphics, they can't be tested.