AMD A10-6800K APU Overclocked to Over 8.0 GHz

[Nephilim_17]

hahahaha wow, superb overclocking...

 

[daglesj]

Fun way to spend an afternoon.

 

[InvalidError]

So is it any cheaper to use thermal paste and a poorly constructed IHS compared to whatevertheyusedbefore?

What they used before was solder and soldering the IHS onto the CPU die comes with its own load of costs and risks.

Using paste is certainly cheaper, faster and safer from the manufacturing perspective: no need to chemically process the die/IHS surfaces for soldering and no need to go through an extra heating/cooling cycle. I would not be too surprised if CPUs getting damaged (ex.: cracked uBGA balls) by the weight and force of attached aftermarket heatsinks during shipping also accounts for part of the reason to leave a gap between IHS and die.

 

[JPNpower]

All the people suggesting having fewer transistors in the name of higher clocks should try to learn what makes a CPU perform well... It's not just clock speeds.

I personally was just pointing out the facts. I would much rather take modern CPU with lower clocks than an ancient thing that somehow gets 10 gigahertz, but it is interesting the direction clock speeds would be headed. They started off low, rose high, and now are falling again. Imagine, the days of ghz CPUs being incredible overclocks may be back..

 

[GreaseMonkey_62]

It looks like right now the big thing limiting speed is cooling. I bet if you had a liquid cooled system on your own rig you could easily run the CPU at 5ghz.

 

[InvalidError]

They started off low, rose high, and now are falling again. Imagine, the days of ghz CPUs being incredible overclocks may be back..

Don't count on it too much. AMD seems to be repeating Intel's mistake of sacrificing IPC/ILP and power for clock speed much like what Intel did with Netburst. Most people who have owned a P4 are not particularly interested in reliving that.

While high overclocking margins may seem nice, it actually highlights at least two problems:
1) unpredictable yields: if AMD could rely on large number of parts hitting higher clocks under normal operating conditions, they should be selling parts rated as such to increase profit margins - AMD desperately needs those
2) sub-optimal logic packing between DFFs: wasting power, transistors and introduces potentially avoidable latency that may degrade IPC.

Basically, high overclocks means AMD messed up their engineering and marketing coordination.

 

[milktea]

All the people suggesting having fewer transistors in the name of higher clocks should try to learn what makes a CPU perform well... It's not just clock speeds.

Sure it's not just clock speed that delivers performance. But woudn't it be nice to have fewer transistors to achieve the same or even better performance? It might sound counter intuitive, but not impossible.

 

[InvalidError]

Sure it's not just clock speed that delivers performance. But woudn't it be nice to have fewer transistors to achieve the same or even better performance? It might sound counter intuitive, but not impossible.

Optimal performance is a balance between how much work you can do per clock, how fast you can run that clock and how many cycles it takes to finish executing instructions.

Longer pipelines which are required to reach higher speeds use more transistors and power in DFFs. Instruction scheduling to accommodate longer pipelines is more complex (more transistors) and higher execution latency may hinder performance due to slower dependency resolution.

Fewer transistors may run faster but if you sacrifice IPC in doing so, the net gain in overall performance may be small or even negative.

 

[milktea]

Optimal performance is a balance between how much work you can do per clock, how fast you can run that clock and how many cycles it takes to finish executing instructions.
...

You're just stating the obvious. So I couldn't disagree.
But when I meant better performance with fewer transistors, I was aiming at something that is not so trivial. And it wasn't anything specific, like IPC or clock speed, or pipelining.
I said it it not impossible, but at the same time, it is not simple. It might even require a new architecture. Not just a small tweak to spin a silicon.

 

[InvalidError]

You're just stating the obvious. So I couldn't disagree.
But when I meant better performance with fewer transistors, I was aiming at something that is not so trivial. And it wasn't anything specific, like IPC or clock speed, or pipelining.

Every transistor should be there for a reason and refactoring a design to reduce the transistor count will almost inevitably come at the expense of something else.

If you cut into cache, you increase the frequency where execution units are starved for data. If you cut into branch prediction, you increase the frequency at which execution units are wasting time on the wrong prediction or stalled for condition result. If you cut in the reorder buffer, you increase the likelihood of execution pipelines getting under-used due to no eligible instructions available. If you cut in the register file, you increase the likelihood of running out of renamed registers. Etc.

All of those and many more structures have very predictable and well-documented transistor costs and there aren't really any ways to magically reduce their transistor costs any further.

The name of the game is finding the most effective balance of all those well-known structures and putting them together in the most effective manner. Being more effective and efficient usually calls for more transistors so the likelihood of achieving performance gains while reducing transistor count is extremely unlikely. It could be done by chucking out a large chunk of IPC-centric stuff for more SMT-oriented stuff but that's pointless without massively threaded workloads and once that's done, you are back to adding transistors for IPC anyway so the pursuit of lower transistor counts would be very short-lived at best.

 

[milktea]

... All of those and many more structures have very predictable and well-documented transistor costs and there aren't really any ways to magically reduce their transistor costs any further.

'structures', 'very predictable', 'well-documented' all are likely attributes of not thinking out side the box and lack of creativity.

 

[InvalidError]

'structures', 'very predictable', 'well-documented' all are likely attributes of not thinking out side the box and lack of creativity.

There are only so many ways to create a SRAM cell for cache, TAG or register files. There are only so many ways of creating an adder/counter, DFFs, multipliers, multiplexers, etc.

Most of that fundamental stuff which accounts for the bulk of a CPU's die area and transistor count has remained fundamentally unchanged for most of the past 20+ years because there really isn't any "creative" new way to do them. The way they are organized changes a little (ex.: caches partitioned in more banks with increased associativity - and this means more transistors in managing this new, more complex organization) but the fundamental structures remain the same - that's pretty much all the "creative" wiggle-room there is in CPU design between novelty structures of which there hasn't been any that I can think of in the past 10+ years.

There really isn't much to be "creative" about in CPU design since practically all the fundamentally groundbreaking stuff we take for granted today was done 15+ years ago by DEC and a handful of other RISC vendors.

 

[ojas]

The TIM that Intel is using for the IHS is making it difficult to cool the processor.

The TIM is not the real problem from what I have read.

Someone who de-lidded his Haswell measured the substrate-to-top-of-die and substrate-to-IHS-top heights, subtracted the IHS thickness from the difference and concluded that there is a ~60 micron gap between the IHS and CPU die - the IHS is not making physical contact with the die at all. By replacing the TIM with known high-quality stuff and replicating the gap using paper shims to achieve the same substrate-to-IHS thickness, he found out that Intel's TIM appears to be just as good as enthusiast stuff since the enthusiast stuff actually performed a few degrees worse than Intel's TIM. Removing the gap (shims) is what produced a 20-30C drop in OC temperatures.

Based on that, it seems Intel's TIM would be perfectly fine were it not for the surprisingly large gap between IHS and die.

Yeah that's what i've read too...not sure why they're doing that too. I mean, deliberately making your chips run hotter is weird.

EDIT: Just read Invalid's reasoning for this.

 

[ojas]

... All of those and many more structures have very predictable and well-documented transistor costs and there aren't really any ways to magically reduce their transistor costs any further.

'structures', 'very predictable', 'well-documented' all are likely attributes of not thinking out side the box and lack of creativity.

To add to what InvalidError's already told you (and us), think of it this way:
You've found the most efficient way to implement a certain logic circuit, below which you can't go. Any larger design based off aggregates of that circuit can only have discrete numbers of that circuit.

Once you've found the most efficient way to implement that larger circuit, you move on to the next level.

So each of these levels in CPU design have mostly been optimized for very long ago, and digital electronics still fundamentally follows the same principals set very long ago. You can't do anything about reducing minimum transistor counts for most of the units already there, unless you figure out a new way to do it. You can cut out some stuff that's not required anymore, you can add new stuff, but there are costs that exist.

Alternatively, you can switch to a different ISA, or change the inherent nature of computer design altogether, but you can only take it so far.

I think i'm oversimplifying things in some places, but well...

p.s. InvalidError: Just want to say thanks a lot for your posts! Probably some of the most informative on the site. Do you work in the industry? 😱

 

[InvalidError]

p.s. InvalidError: Just want to say thanks a lot for your posts! Probably some of the most informative on the site. Do you work in the industry? 😱

HDL, FPGAs and ASICs are my preferred fields of electrical engineering but I haven't worked specifically in it since my job at Matrox a couple of years ago. I do try to keep tabs on what's happening though.

As you said, once someone finds the optimal way of doing something (often as a Master / Doc / post-Doc thesis), that's pretty much end-of-the-road as far as ever finding a better way to do it in the future unless someone proves him/her (and all who approved said thesis) wrong but this does not happen very often.

 

[JPNpower]

I think milktea was referring generally to innovation that is beyond the narrow scope of others. Professionals (with narrow scopes) such as yourselves probably understand how improbable that is.

And if you watch F1 long enough, you'd know that innovation never stops.

 

[InvalidError]

And if you watch F1 long enough, you'd know that innovation never stops.

While innovation "never stops", new fundamental principles or fundamental changes to existing principles are still few and very far between even in F1.

Not to mention that a large chunk of "innovation" in F1 is about circumventing or bending rules without breaking them. Many of F1's rules such as bans on electronic or other forms of active assists are mainly about preventing them from taking too much "sportiness" out of F1 so F1 engineers need to find other roundabout ways to reduce driver strain.

 

[JPNpower]

I guess we need the FIA to control maximum GHZ and cores in CPUs... oh dear.

 

[PA Systems]

It's an article that's supposed to impress us but only makes me queasy. At -195 degrees Celsius one could not touch the machine at all for fear of frostbite or worse. Why do this at all? Oh, yeah, I get it. It's because you can. You can if you have the kind of resources for this kind of extreme setup. The real world most of us live in has no use for such circus tricks. Good point made by previous commentators about crashing programs and obtaining liquid nitrogen. Shouldn't that be a controlled substance like drugs and alcohol?

 

[InvalidError]

At -195 degrees Celsius one could not touch the machine at all for fear of frostbite or worse. (...) Shouldn't that be a controlled substance like drugs and alcohol?

Only the CPU gets chilled with LN2. Most of the rest of the system is much closer to room temperature so just about everything except the copper cylinder/heatsink is safe to touch.

As for making LN2 a controlled substance, air contains ~75% Nitrogen and obtaining LN2 can be as simple as compressing air to a few MPa using a multi-stage setup. Successfully regulating something that is so easily obtainable would be practically impossible. It would likely end up causing more serious casualties from catastrophic compressor or tank failures than misuse of LN2 causes today. In the grand scheme of things, retail access to LN2 is most likely much safer.

 

[sanilmahambre]

Liquid nitrogen! thats what i was looking for

 

[ojas]

p.s. InvalidError: Just want to say thanks a lot for your posts! Probably some of the most informative on the site. Do you work in the industry? 😱

HDL, FPGAs and ASICs are my preferred fields of electrical engineering but I haven't worked specifically in it since my job at Matrox a couple of years ago. I do try to keep tabs on what's happening though.

As you said, once someone finds the optimal way of doing something (often as a Master / Doc / post-Doc thesis), that's pretty much end-of-the-road as far as ever finding a better way to do it in the future unless someone proves him/her (and all who approved said thesis) wrong but this does not happen very often.

Ah i see. I'm still learning the ropes (undergrad). Thanks for the posts, really, get to learn a lot.

 

[rounakr94]

AMD is advancing real fast. I wont be amazed to see the catch Intel in the next 2-3 years. KUDGW amd

 

[InvalidError]

Yeah, those are all real obvious

They should be obvious enough to people who are somewhat familiar with ASIC production. A degree in electrical engineering helps.

 

[Tonylu1595]

yet is still not as powerfull as an i7 in stock speeds yet needs liquid nitrogen