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JAYDEEJOHN
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- Aug 23, 2006
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fazers_on_stun
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You can probably thank Hector Ruiz for that deal.. The good news is that he got fired from GF for his role in the insider-trading scandal. Well OK he resigned before getting his arse handed to him, but IMO the writing was on the wall already..
I know there are commonly penalties for severing a contract purchase, as fabs have to be able to plan ahead to keep their expensive equipment somewhat busy, but where are the penalties GF should have paid to AMD for all those delays and low yield ramps for Llano and BD? This penalty business seems pretty one-sided IMO. Plus all the R&D payments from AMD to GF for SOI fabrication, I suppose. How about GF cough up some $$ to AMD for GF being stupid enough to go with gate-first HKMG on 32nm?? Or IBM for that matter, since it was IBM urging all their fab consortium members including GF, that gate-first was the way to go?
But the top execs at AMD giving themselves IIRC a $68M pay & bennie increase this year is just sad. Whatever happened to reducing your pay to $1 a year during times of trouble, as the CEOs of other companies have done in the past when falling on hard times?? Just goes to show these guys are more interested in lining their pockets than much of anything else.
fazers_on_stun
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IIRC it was about 18 months ago that GF was proclaiming "we don't need no stinkin' FinFETs!"
.Personally I think all these fabs, TSMC included, are going to find lots of surprises when trying to skip nodes and at the same time going to 2.5D or 3D transistor structures. IOW, their roadmaps are way too optimistic IMO. And seeing as how I'm batting nearly 1000 in the prognostication dept. lately, my opinion is worth its weight in [strike]gold[/strike] the photons emanating from your display!
But, as always we shall see in a year or two.
mayankleoboy1
Distinguished
- Aug 11, 2010
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^ Well since every fab (samsung, TSMC, GF) is skipping a node, i think they know what they are doing.
they must be spending all the time in understanding 90% of the challenges. Of course, the remaining 10% issues will cost them the rest of the 90% time
they must be spending all the time in understanding 90% of the challenges. Of course, the remaining 10% issues will cost them the rest of the 90% time
fazers_on_stun :
IIRC it was about 18 months ago that GF was proclaiming "we don't need no stinkin' FinFETs!" .
Personally I think all these fabs, TSMC included, are going to find lots of surprises when trying to skip nodes and at the same time going to 2.5D or 3D transistor structures. IOW, their roadmaps are way too optimistic IMO. And seeing as how I'm batting nearly 1000 in the prognostication dept. lately, my opinion is worth its weight in [strike]gold[/strike] the photons emanating from your display!
But, as always we shall see in a year or two.
.Personally I think all these fabs, TSMC included, are going to find lots of surprises when trying to skip nodes and at the same time going to 2.5D or 3D transistor structures. IOW, their roadmaps are way too optimistic IMO. And seeing as how I'm batting nearly 1000 in the prognostication dept. lately, my opinion is worth its weight in [strike]gold[/strike] the photons emanating from your display!
But, as always we shall see in a year or two.
The level of BS execs are willing to spew to appease the investors keeps rising.
TSMC hasn't even fully ramped their 32nm production and that's close to 3 years after Intel started shipping 32nm. Looking at the roadmaps for Nvidia/AMD we can see nothing new will be viable through 2013 and likely through 2014.
The foundries are having trouble at the cutting edge because the vendor nor customer want to admit any fault. The engineers are always right, let the physics be damned. AMD blames GF, GF blames AMD. Neither wins.
Intel gets the job done because they're both in the same boat. The process engineers and the ASIC design engineers have to work closely together. They're less concerned with who's going to get the bill for each mistake.
skitz9417
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- Apr 28, 2012
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AMD will continue to support socketed processors well into the future
Subject: Processors | December 5, 2012 - 05:33 PM | Ryan Shrout
Tagged: socket, Intel, BGA, amd
Over the past week or more we have been seeing a lot of news about Intel's rumored move to leave the world of socket-based processors behind after the pending Broadwell parts are released as BGA - ball grid array - and are soldered to motherboards directly. I would highly encourage everyone to read Josh's thoughts on the subject that are not nearly as damning as others might have you believe.
However, we got this official note from AMD earlier in the week that I thought I would share:
AMD has a long history of supporting the DIY and enthusiast desktop market with socketed CPUs & APUs that are compatible with a wide range of motherboard products from our partners. That will continue through 2013 and 2014 with the “Kaveri” APU and FX CPU lines. We have no plans at this time to move to BGA only packaging and look forward to continuing to support this critical segment of the market.
As the company that introduced new types of BGA packages in ultrathin platforms several years ago, and today offers BGA-packaged processors for everything from ultrathin notebooks to all-in-one desktops, to embedded applications and tablets, we certainly understand Intel’s enthusiasm for the approach. But for the desktop market, and the enthusiasts with whom AMD has built its brand, we understand what matters to them and how we can continue to bring better value and a better experience.
Obviously AMD is trying to persuade PC builders that not only is its path the safest in the future but maybe that supporting AMD today might help make sure it can arrive to the future well enough to continue the enthusiast path.
If Intel even starts to heavily side with BGA processors, is a move to AMD in your future again?
Subject: Processors | December 5, 2012 - 05:33 PM | Ryan Shrout
Tagged: socket, Intel, BGA, amd
Over the past week or more we have been seeing a lot of news about Intel's rumored move to leave the world of socket-based processors behind after the pending Broadwell parts are released as BGA - ball grid array - and are soldered to motherboards directly. I would highly encourage everyone to read Josh's thoughts on the subject that are not nearly as damning as others might have you believe.
However, we got this official note from AMD earlier in the week that I thought I would share:
AMD has a long history of supporting the DIY and enthusiast desktop market with socketed CPUs & APUs that are compatible with a wide range of motherboard products from our partners. That will continue through 2013 and 2014 with the “Kaveri” APU and FX CPU lines. We have no plans at this time to move to BGA only packaging and look forward to continuing to support this critical segment of the market.
As the company that introduced new types of BGA packages in ultrathin platforms several years ago, and today offers BGA-packaged processors for everything from ultrathin notebooks to all-in-one desktops, to embedded applications and tablets, we certainly understand Intel’s enthusiasm for the approach. But for the desktop market, and the enthusiasts with whom AMD has built its brand, we understand what matters to them and how we can continue to bring better value and a better experience.
Obviously AMD is trying to persuade PC builders that not only is its path the safest in the future but maybe that supporting AMD today might help make sure it can arrive to the future well enough to continue the enthusiast path.
If Intel even starts to heavily side with BGA processors, is a move to AMD in your future again?
- Apr 7, 2008
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fazers_on_stun
Splendid
- Aug 31, 2006
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Well 2014 is only 13 months away, so we shall see..
There's a reason why the industry leader (Intel) minimizes the risks inherent in new nodes/new designs with their tick-tock model. And as far as TSMC and GF go, their track record at 40nm and 32nm and 28nm is not exactly inspiring a lot of confidence
.
JAYDEEJOHN
Champion
- Aug 23, 2006
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TSMCs 28 was fine.
You need to go every other node for problems.
40 wasnt good.
Earliest adopter AMD gpus were is short supply for early ramp up, as other customers came along, each was alloted so many wafers, keeping supplies lower, but as for a decent node is was very good, and is fully ramped now.
Understand, this isnt Intel where 2-3 months can be moved very easily, and stockpiling is OK.
These customers dont want stockpiling, they want new node ASAP
You need to go every other node for problems.
40 wasnt good.
Earliest adopter AMD gpus were is short supply for early ramp up, as other customers came along, each was alloted so many wafers, keeping supplies lower, but as for a decent node is was very good, and is fully ramped now.
Understand, this isnt Intel where 2-3 months can be moved very easily, and stockpiling is OK.
These customers dont want stockpiling, they want new node ASAP
dogman_1234
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skitz9417
Distinguished
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http://www.overclock.net/t/1299828/lr-amd-shows-steamroller-architecture-details-talks-about-surround-computing/0_100 their is a another fourm people can leran more on steamroller
mayankleoboy1
Distinguished
- Aug 11, 2010
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Something that may/ may not come sometime in 2014 is quite difficult to discuss about. For all we know, SR may never release publicly.. AMD could maybe directly release Excavator.
skitz9417
Distinguished
- Apr 28, 2012
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when is the amd steamroller release 2013 or 2014
You've seen the slides everywhere and read through what Josh could observe and predict from those slides but at the end of Hot Chips will still know little more about the core everyone is waiting for. The slides show a core little changed from Bulldozer, which is exactly what we've been expecting as AMD has always described Steamroller as a refined Bulldozer design, improving the existing architecture as opposed to a complete redesign. SemiAccurate did pull out one little gem which might mean good news for both AMD and consumers which pertains to the high density libraries slide. The 30% decrease in size and power consumption seems to have been implemented by simply using the high density libraries that AMD uses for GPUs. As this library already exists, AMD didn't need to spend money to develop it, they essentially managed this 30% improvement with a button press, as SemiAccurate put it. This could well mean that Steamroller will either come out at a comparatively low price or will give AMD higher profit margins ... or a mix of both.
http://www.theinquirer.net/inquirer/news/2208525/amd-sticks-with-socket-am3-for-steamroller
The Bulldozer architecture within in AMD's current FX series CPUs, has generated no end of controversy (see pp. 1-123) since its release late 2011. For one sister site Atomic's own lab testing saw the top model FX-8150 come up short in a large number of areas. How then, will Bulldozer's successors fare?
In the first update for AM3+ systems, second generation processors (codenamed Piledriver) are very much inbound for desktops this year, and a few tweaks bring a welcome 10% performance bump and much lower power draw. In that vein we should see desktop A-Series branded (CPU + graphics parts) over the next few weeks and FX-Series (enthusiast CPU only processors) later in 2012.
Even more interesting is just how much next-year's further evolved 'Steamroller' processor (expected to also be compatible with AM3+) will shake things up. Bulldozer had the disctinction of being the first completely new x86 (PC) chip design since the VIA Cyrix III circa 2000 and chipmaking is a hugely complex task. Five year gestation or not, this first of a breed ended up rushed and has significant potential for optimisation - AMD have given us their story on 'how' and 'how much faster' Steamroller will be.
Where the second-gen Piledriver concentrates primarily on adding 'Resonant Clock Mesh' technology to its Bulldozer predecessor, the third gen Steamroller will be a major reworking of the underlying design that debuted in Bulldozer. Previous AMD roadmaps targeted a 10% per generation improvement in performance (which Piledriver met) however with the design being more fleshed out, AMD now imply a 30% performance increase. This is a pretty significant boost if true and more than a few sources suggest it is - then again 'more than a few' sources suggested Bulldozer would be good.
Chief among the design improvements is doubling the number of pre-processing 'decode' modules, bringing this part of the chip back to the traditional one-per-core level. Given the amount of time Bulldozer and Piledriver spend with inactive processing areas (indicating a design flaw in the pre-processing stage) this is a significant and straightforward win. The processing centres (Floating Point and to a lesser extent Integer units) also receive significant changes, as do the Prediction unit and Cache:
Steamroller was the subject of the recent keynote speech by AMD Chief Technology Officer Mark Papermaster, along with a fair bit of marketing speak on a 'Surround Computing Era'. Nonetheless along with a move to a slightly more advanced 28nm 'Bulk' (from 32nm 'SOI') manufacturing process, the significant redesigns outlined in Steamroller do hold the potential to yield equally significant performance gains. This in turn may close the gap with Intel, whose fourth-generation 'Haswell' architecture (due May-June 2013) is set to give roughly a 10-20% over its third generation 'Ivy Bridge' designs. We should see more concrete information from Intel on Haswell over the next week at its flagship IDF conference, which starts September 11th.
All in all it does seem certain AMD will deliver a significant performance jump with Steamroller, exactly how significant this will turn out to be and when the chips will reach shelves is not as clear yet. We'll keep you up to date as the details come into focus
"With that in mind, the HDL slide was rather interesting. AMD is claiming that if you rebuild Bulldozer with an HDL library, the resulting chip has a 30% decrease in size and power use. To AMD at least, this is worth a full shrink, but we only buy that claim if it is 30% smaller and 30% less power hungry, not 30% in aggregate. That said, it is a massive gain with just a button press.
AMD should be applauded, or it would have been, but during the keynote, the one thing that kept going through my mind was, “Why didn’t they do this 5 years ago?”. If you can get 30% from changing out a library to the ones you build your GPUs with, didn’t someone test this out before you decided on layout tools?"
http://www.tomshardware.com/news/AMD-Steamroller-Piledriver-Kaveri-processors,17217.html
http://www.techradar.com/au/news/computing-components/processors/computing/pc/is-amds-steamroller-cpu-design-the-companys-last-roll-of-the-dice-1094595
http://www.extremetech.com/computing/135105-amd-details-steamroller-cpu-architecture-a-refined-piledriver-with-a-dynamic-l2-cache
There was nothing catastrophically wrong with the design itself, but not all the bugs were ironed out and the design was not completely optimized.
At the time, Barcelona seemed rushed out, as the company was in a hurry to offer something different than the popular Athlon 64 X2 available in those days.
All that was needed was some grooming in the bug forest and a considerably larger level 3 cache. Then we had Phenom II that was and still is successfully competing against its respective Core 2 Duo counterparts.
The Bulldozer story was similar.
While the design differences between Phenom II and Bulldozer are quite significant and the number of floating point units (FPU) has been halved, many expected the design to literally bulldoze the competition out of the way.
We weren’t so sure about the FlexFP. Our opinion was that it would lead to some serious efficiency and throughput increases in the server sector, but on the desktop side we would have considered AMD lucky if it managed to get 4 FPUs to perform like the previous 6 FPUs.
To its credit, AMD has successfully managed exactly that, but that’s certainly not enough to fight Ivy Bridge.
The incoming Vishera silicon with Piledriver enhancements is what Bulldozer should have been in the first place.
We’re sure AMD’s Dirk Meyer was envisioning something like Steamroller. He should have made the initial Bulldozer more like today’s Piledriver, but at least we know that Bulldozer had some issues that have now been ironed out.
Many say that Steamroller will not be able to face Haswell, but the reality is that Steamroller is apparently a proper implementation of the FlexFP concept. The doubling of the cache, dispatch and fetching units will greatly increase the performance.
Many are estimating conservative values ranging between a 20% and a 30% performance improvement over the current Bulldozer processors, but sources inside the engineering department at AMD are reportedly expecting 45% performance improvements.
This puts AMD’s Steamroller beyond Ivy Bridge’s performance and right against Intel’s Haswell.
Some are wondering about the company’s statements that they won’t be fighting for the desktop market anymore.
We believe that’s just PR talk to divert attention from the fact than AMD’s current top desktop CPUs barely make it against Intel’s quad-cores with no fighting chance against any hexa-core from the CPU giant.
The most pressing question right now is whether AMD’s next desktop platform will keep the current socket or whether they will go for something with DDR4.
It would really be early for the company to go for DDR4, as even Intel is not planning DDR4 platforms until 2014, but it will also seem strange to see AMD change two sockets in two years.
A new Steamroller socket with support for DDR3 will allow AMD to get away from any drawbacks that the current AM3+ platform might have, but then, in 2014 they will be forced to put another socket out with DDR4 support.
One strategy would be to keep the current AM3+ design and use some level 4 cache to improve on the lack of a triple or quad channel memory controller, but that remains to be seen
Yesterday we showed some leaked information on AMDs upcoming Piledriver CPUs, today AMD officially announced information (check this presentation) on a new architecture; Steamroller. The new 28nm chips using this architecture should have lower power usage while performing better. The details were unveiled by AMDs CTO Mark Papermaster during the Hot Chips conference. In 2011 AMD introduced a new modular micro-architecture. The two cores of each module share components which should have resulted in better performance than Intel’s Hyperthreading but lower performance than two seperate cores. The architecture debuted in AMDs FX Bulldozer CPUs but was not able to deliver the performance as expected.
The Piledriver architecture should already be an improvement but in 2013 AMD hopes to introduce Steamroller which should be an even bigger improvement. These chips would build on Bulldozer and Piledriver architecture but should again be faster and consume less watts. The bottlenecks in Bulldozer and Piledriver are e.g. the shared fetch and decode hardware in the front-end. In Steamroller the decode hardware is doubled, which means the rest of the core doesn’t have to wait for instructions. The fetch hardware remains shared between cores. With all the changes, AMD expects a 30% increase in performance.
AMD also improved the shared floating point unit which each Steamroller module has. The FPU still has the same execution capabilities, but it has become smaller. Also the MMX unit and 128-bit FMAC pipes share some hardware. With the reduction of the pipeline resources AMD hopes to deliver the same throughput while consuming less power and smaller hardware, something that already should have been done in Bulldozer and Piledriver CPUs.
Also cache of the CPUs has been changed, L1 cache sizes have gone up and also the interface between L1 and L2 cache has been improved. Even better, L2 cache memory that isn’t used can be turned off which should result in less power usage.
The first products using the Steamroller architecture should appear in 2013, and should bring AMD less power consuming but more powerfull processorcores which can be used in AMDs upcoming APUs. In 2014 AMD will introduce another new architecture: Excavator with, you guessed it, even better performance
http://www.bit-tech.net/news/hardware/2012/08/29/amd-steamroller/1
http://wccftech.com/amds-kaveri-based-28nm-richland-apu-features-steamroller-cores-compatibility-fm2-socket/
http://www.pcgamer.com/2012/08/29/amd-stokes-up-its-engines-for-steamroller/
http://www.xbitlabs.com/news/cpu/display/20120829180358_AMD_Unveils_First_Details_About_Steamroller_Third_Gen_Bulldozer_Incoming.html
http://hothardware.com/News/AMDs-Next-Gen-Steamroller-CPU-Could-Deliver-Where-Bulldozer-Fell-Short\
http://forums.overclockers.co.uk/showthread.php?t=18465879
https://www.youtube.com/watch?v=iKW0CkTTBU0
https://www.youtube.com/watch?v=PMSWhPrT99g
and sorry for the long post guys
You've seen the slides everywhere and read through what Josh could observe and predict from those slides but at the end of Hot Chips will still know little more about the core everyone is waiting for. The slides show a core little changed from Bulldozer, which is exactly what we've been expecting as AMD has always described Steamroller as a refined Bulldozer design, improving the existing architecture as opposed to a complete redesign. SemiAccurate did pull out one little gem which might mean good news for both AMD and consumers which pertains to the high density libraries slide. The 30% decrease in size and power consumption seems to have been implemented by simply using the high density libraries that AMD uses for GPUs. As this library already exists, AMD didn't need to spend money to develop it, they essentially managed this 30% improvement with a button press, as SemiAccurate put it. This could well mean that Steamroller will either come out at a comparatively low price or will give AMD higher profit margins ... or a mix of both.
http://www.theinquirer.net/inquirer/news/2208525/amd-sticks-with-socket-am3-for-steamroller
The Bulldozer architecture within in AMD's current FX series CPUs, has generated no end of controversy (see pp. 1-123) since its release late 2011. For one sister site Atomic's own lab testing saw the top model FX-8150 come up short in a large number of areas. How then, will Bulldozer's successors fare?
In the first update for AM3+ systems, second generation processors (codenamed Piledriver) are very much inbound for desktops this year, and a few tweaks bring a welcome 10% performance bump and much lower power draw. In that vein we should see desktop A-Series branded (CPU + graphics parts) over the next few weeks and FX-Series (enthusiast CPU only processors) later in 2012.
Even more interesting is just how much next-year's further evolved 'Steamroller' processor (expected to also be compatible with AM3+) will shake things up. Bulldozer had the disctinction of being the first completely new x86 (PC) chip design since the VIA Cyrix III circa 2000 and chipmaking is a hugely complex task. Five year gestation or not, this first of a breed ended up rushed and has significant potential for optimisation - AMD have given us their story on 'how' and 'how much faster' Steamroller will be.
Where the second-gen Piledriver concentrates primarily on adding 'Resonant Clock Mesh' technology to its Bulldozer predecessor, the third gen Steamroller will be a major reworking of the underlying design that debuted in Bulldozer. Previous AMD roadmaps targeted a 10% per generation improvement in performance (which Piledriver met) however with the design being more fleshed out, AMD now imply a 30% performance increase. This is a pretty significant boost if true and more than a few sources suggest it is - then again 'more than a few' sources suggested Bulldozer would be good.
Chief among the design improvements is doubling the number of pre-processing 'decode' modules, bringing this part of the chip back to the traditional one-per-core level. Given the amount of time Bulldozer and Piledriver spend with inactive processing areas (indicating a design flaw in the pre-processing stage) this is a significant and straightforward win. The processing centres (Floating Point and to a lesser extent Integer units) also receive significant changes, as do the Prediction unit and Cache:
Steamroller was the subject of the recent keynote speech by AMD Chief Technology Officer Mark Papermaster, along with a fair bit of marketing speak on a 'Surround Computing Era'. Nonetheless along with a move to a slightly more advanced 28nm 'Bulk' (from 32nm 'SOI') manufacturing process, the significant redesigns outlined in Steamroller do hold the potential to yield equally significant performance gains. This in turn may close the gap with Intel, whose fourth-generation 'Haswell' architecture (due May-June 2013) is set to give roughly a 10-20% over its third generation 'Ivy Bridge' designs. We should see more concrete information from Intel on Haswell over the next week at its flagship IDF conference, which starts September 11th.
All in all it does seem certain AMD will deliver a significant performance jump with Steamroller, exactly how significant this will turn out to be and when the chips will reach shelves is not as clear yet. We'll keep you up to date as the details come into focus
"With that in mind, the HDL slide was rather interesting. AMD is claiming that if you rebuild Bulldozer with an HDL library, the resulting chip has a 30% decrease in size and power use. To AMD at least, this is worth a full shrink, but we only buy that claim if it is 30% smaller and 30% less power hungry, not 30% in aggregate. That said, it is a massive gain with just a button press.
AMD should be applauded, or it would have been, but during the keynote, the one thing that kept going through my mind was, “Why didn’t they do this 5 years ago?”. If you can get 30% from changing out a library to the ones you build your GPUs with, didn’t someone test this out before you decided on layout tools?"
http://www.tomshardware.com/news/AMD-Steamroller-Piledriver-Kaveri-processors,17217.html
http://www.techradar.com/au/news/computing-components/processors/computing/pc/is-amds-steamroller-cpu-design-the-companys-last-roll-of-the-dice-1094595
http://www.extremetech.com/computing/135105-amd-details-steamroller-cpu-architecture-a-refined-piledriver-with-a-dynamic-l2-cache
There was nothing catastrophically wrong with the design itself, but not all the bugs were ironed out and the design was not completely optimized.
At the time, Barcelona seemed rushed out, as the company was in a hurry to offer something different than the popular Athlon 64 X2 available in those days.
All that was needed was some grooming in the bug forest and a considerably larger level 3 cache. Then we had Phenom II that was and still is successfully competing against its respective Core 2 Duo counterparts.
The Bulldozer story was similar.
While the design differences between Phenom II and Bulldozer are quite significant and the number of floating point units (FPU) has been halved, many expected the design to literally bulldoze the competition out of the way.
We weren’t so sure about the FlexFP. Our opinion was that it would lead to some serious efficiency and throughput increases in the server sector, but on the desktop side we would have considered AMD lucky if it managed to get 4 FPUs to perform like the previous 6 FPUs.
To its credit, AMD has successfully managed exactly that, but that’s certainly not enough to fight Ivy Bridge.
The incoming Vishera silicon with Piledriver enhancements is what Bulldozer should have been in the first place.
We’re sure AMD’s Dirk Meyer was envisioning something like Steamroller. He should have made the initial Bulldozer more like today’s Piledriver, but at least we know that Bulldozer had some issues that have now been ironed out.
Many say that Steamroller will not be able to face Haswell, but the reality is that Steamroller is apparently a proper implementation of the FlexFP concept. The doubling of the cache, dispatch and fetching units will greatly increase the performance.
Many are estimating conservative values ranging between a 20% and a 30% performance improvement over the current Bulldozer processors, but sources inside the engineering department at AMD are reportedly expecting 45% performance improvements.
This puts AMD’s Steamroller beyond Ivy Bridge’s performance and right against Intel’s Haswell.
Some are wondering about the company’s statements that they won’t be fighting for the desktop market anymore.
We believe that’s just PR talk to divert attention from the fact than AMD’s current top desktop CPUs barely make it against Intel’s quad-cores with no fighting chance against any hexa-core from the CPU giant.
The most pressing question right now is whether AMD’s next desktop platform will keep the current socket or whether they will go for something with DDR4.
It would really be early for the company to go for DDR4, as even Intel is not planning DDR4 platforms until 2014, but it will also seem strange to see AMD change two sockets in two years.
A new Steamroller socket with support for DDR3 will allow AMD to get away from any drawbacks that the current AM3+ platform might have, but then, in 2014 they will be forced to put another socket out with DDR4 support.
One strategy would be to keep the current AM3+ design and use some level 4 cache to improve on the lack of a triple or quad channel memory controller, but that remains to be seen
Yesterday we showed some leaked information on AMDs upcoming Piledriver CPUs, today AMD officially announced information (check this presentation) on a new architecture; Steamroller. The new 28nm chips using this architecture should have lower power usage while performing better. The details were unveiled by AMDs CTO Mark Papermaster during the Hot Chips conference. In 2011 AMD introduced a new modular micro-architecture. The two cores of each module share components which should have resulted in better performance than Intel’s Hyperthreading but lower performance than two seperate cores. The architecture debuted in AMDs FX Bulldozer CPUs but was not able to deliver the performance as expected.
The Piledriver architecture should already be an improvement but in 2013 AMD hopes to introduce Steamroller which should be an even bigger improvement. These chips would build on Bulldozer and Piledriver architecture but should again be faster and consume less watts. The bottlenecks in Bulldozer and Piledriver are e.g. the shared fetch and decode hardware in the front-end. In Steamroller the decode hardware is doubled, which means the rest of the core doesn’t have to wait for instructions. The fetch hardware remains shared between cores. With all the changes, AMD expects a 30% increase in performance.
AMD also improved the shared floating point unit which each Steamroller module has. The FPU still has the same execution capabilities, but it has become smaller. Also the MMX unit and 128-bit FMAC pipes share some hardware. With the reduction of the pipeline resources AMD hopes to deliver the same throughput while consuming less power and smaller hardware, something that already should have been done in Bulldozer and Piledriver CPUs.
Also cache of the CPUs has been changed, L1 cache sizes have gone up and also the interface between L1 and L2 cache has been improved. Even better, L2 cache memory that isn’t used can be turned off which should result in less power usage.
The first products using the Steamroller architecture should appear in 2013, and should bring AMD less power consuming but more powerfull processorcores which can be used in AMDs upcoming APUs. In 2014 AMD will introduce another new architecture: Excavator with, you guessed it, even better performance
http://www.bit-tech.net/news/hardware/2012/08/29/amd-steamroller/1
http://wccftech.com/amds-kaveri-based-28nm-richland-apu-features-steamroller-cores-compatibility-fm2-socket/
http://www.pcgamer.com/2012/08/29/amd-stokes-up-its-engines-for-steamroller/
http://www.xbitlabs.com/news/cpu/display/20120829180358_AMD_Unveils_First_Details_About_Steamroller_Third_Gen_Bulldozer_Incoming.html
http://hothardware.com/News/AMDs-Next-Gen-Steamroller-CPU-Could-Deliver-Where-Bulldozer-Fell-Short\
http://forums.overclockers.co.uk/showthread.php?t=18465879
https://www.youtube.com/watch?v=iKW0CkTTBU0
https://www.youtube.com/watch?v=PMSWhPrT99g
and sorry for the long post guys
gamerk316
Glorious
- Jul 8, 2008
- 13,250
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Uh oh:
http://techreport.com/news/24026/amd-lowers-wafer-orders-will-pay-320-million-charge
http://www.fudzilla.com/home/item/29743-intel%E2%80%99s-plans-to-shrink-full-steam-ahead
So now AMD is cutting wafer orders, and taking a $320 Million hit as a result.
http://techreport.com/news/24026/amd-lowers-wafer-orders-will-pay-320-million-charge
http://www.fudzilla.com/home/item/29743-intel%E2%80%99s-plans-to-shrink-full-steam-ahead
So now AMD is cutting wafer orders, and taking a $320 Million hit as a result.
griptwister
Distinguished
- Oct 7, 2012
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The funny thing is that AMD said they were going to cancel vishera pd for 2012 and release in 2013 instead, but they released in 2012, on schedule. So, It'll be interesting to see if they drop sr in 2013. I think they really need to. I really want one of these Steamy chips.
Another thing that comes to mind is, "Will AMD keep the AM3+ chipset and add DDR4 and PCIe 3.0 to the mix?"
I currently see no need for PCIe 3.0. But, DDR4 is coming out with intel's new chipset next year... I'm curious to see the performance gains vs DDR3.
Another thing that comes to mind is, "Will AMD keep the AM3+ chipset and add DDR4 and PCIe 3.0 to the mix?"
I currently see no need for PCIe 3.0. But, DDR4 is coming out with intel's new chipset next year... I'm curious to see the performance gains vs DDR3.
JAYDEEJOHN
Champion
- Aug 23, 2006
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In this current economy, being free to produce when what and where may have to become a reality, and is what to me at least, is being done
Chief Executive of AMD: We Are Not Interested in Low-Volume Customers.
AMD Interested Only in High-Volume Design Wins
http://www.xbitlabs.com/news/cpu/display/20121210000002_Chief_Executive_of_AMD_We_Are_Not_Interested_in_Low_Volume_Customers.html
i chuckled at this bit:
i guess he's emphasising low power apus like kabini.
AMD Interested Only in High-Volume Design Wins
http://www.xbitlabs.com/news/cpu/display/20121210000002_Chief_Executive_of_AMD_We_Are_Not_Interested_in_Low_Volume_Customers.html
i chuckled at this bit:
so much for moar cores (in fx cpus).....
i guess he's emphasising low power apus like kabini.
-Fran-
Illustrious
- May 3, 2007
- 9,053
- 2,309
- 42,140
de5_Roy :
Chief Executive of AMD: We Are Not Interested in Low-Volume Customers.
AMD Interested Only in High-Volume Design Wins
http://www.xbitlabs.com/news/cpu/display/20121210000002_Chief_Executive_of_AMD_We_Are_Not_Interested_in_Low_Volume_Customers.html
i chuckled at this bit:
i guess he's emphasising low power apus like kabini.
AMD Interested Only in High-Volume Design Wins
http://www.xbitlabs.com/news/cpu/display/20121210000002_Chief_Executive_of_AMD_We_Are_Not_Interested_in_Low_Volume_Customers.html
i chuckled at this bit:
so much for moar cores (in fx cpus).....
i guess he's emphasising low power apus like kabini.
The original approach was a good one, too bad it was a messy screw up of execution failure. You know BD on 32nm when Llano was first introduced would have been a way better product.
Anyway, that's the correct choice given the landscape. You can't win a drag race with an under-powered engine and lower grip tires, but you can go drifting and have a chance... I guess, hahaha.
I still want to know about DDR4 plans on AMD's side.
Cheers!
skitz9417
Distinguished
- Apr 28, 2012
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fazers_on_stun
Splendid
- Aug 31, 2006
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fazers_on_stun
Splendid
- Aug 31, 2006
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IIRC the justification for SOI was lower power consumption, due to lower leakage. Of course you could also oc the heck outta it, on LN2 anyway
JAYDEEJOHN
Champion
- Aug 23, 2006
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fazers_on_stun :
Somehow I doubt nVidia would agree that TSMC's 28nm was just fine ..
..
Higher demand from earlier adopters left nVidia somewhat behind the 8 ball early on.
As for costs, everyone had to pay those rates, as newer nodes are simply more expensive to make.
Perf wise, its been a very good node
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