blackkstar
Honorable
hcl123 :
Yes Intel needs dearly to pull their head out of the arse... want low power or server oriented per/watt go ARM... after all they already have a license... and give a good high perofrmance x86 chip, the Nehalem/SBN/IB/Hasfail/Boadfail like hell .. and etc.. are more than caput designs, were good on their time, but botched bentmarks can't fool everybody forever, and the professional world knows this... those intel uarches are not that good for multi-threading, compute, and mixing light and swift Integer crunching on the same pipeline execution clusters with way too large vectors (now 256 bit, future 512 bit) (edt) is horribly inefficient
Hasfail in action... 5 to 7% better with FMA code big LOL
http://www.realworldtech.com/forum/?threadid=135386&curpostid=135386
That is hwy they didn't implement FMA4, or any FMA in SBN, just too bad uarch for this... the same why HTM (hardware transactional memory) while scheduled perhaps wont appear not even in HSW-E (only lock elision), and the same with SPECULATIVE MULTI-THREADING(spMT) and or "data speculation" execution, which IP has being(and still is a bit) developed since long, intel uarch simply not good this, AMD simply has a golden opportunity with their BD uarch...
All that is where x86 could win clearly for ARM( way too many years ahead in development)... even games could have lock elision if not HTM, since they are massively parallel, and even take advantage of data speculation...
Its sad many users evangelize a brand on botched benchmarks, and repeat single-thread mantras, instead of demanding for more, much more... is nice for the IDM because they can cut R&D money by half... and the stupid morons can yet pay double for 10 or 20% more performance, all that is needed is a good spin... all this is why ARM can yet win it all...
Hasfail in action... 5 to 7% better with FMA code big LOL
http://www.realworldtech.com/forum/?threadid=135386&curpostid=135386
That is hwy they didn't implement FMA4, or any FMA in SBN, just too bad uarch for this... the same why HTM (hardware transactional memory) while scheduled perhaps wont appear not even in HSW-E (only lock elision), and the same with SPECULATIVE MULTI-THREADING(spMT) and or "data speculation" execution, which IP has being(and still is a bit) developed since long, intel uarch simply not good this, AMD simply has a golden opportunity with their BD uarch...
All that is where x86 could win clearly for ARM( way too many years ahead in development)... even games could have lock elision if not HTM, since they are massively parallel, and even take advantage of data speculation...
Its sad many users evangelize a brand on botched benchmarks, and repeat single-thread mantras, instead of demanding for more, much more... is nice for the IDM because they can cut R&D money by half... and the stupid morons can yet pay double for 10 or 20% more performance, all that is needed is a good spin... all this is why ARM can yet win it all...
Hahahah. This is hilarious. So FMA did nothing for Hasfail? Meanwhile I see OVER 60% increase in performance when custom compiling LAME single thread benchmark in Gentoo to use AVX/FMA, etc?
I thought Intel would just cripple AMD hard, but it looks like Intel can just cripple AMD by making sure no one gets fast instructions as Intel does better with legacy code and AMD would see massive gains with the instructions enabled while Intel wouldn't.
My god it's horrifying. My testing put FX 8350 stock FASTER than Intel in single thread in LAME benchmark according to Tom's review.
No wonder all the Gentoo guys laugh at people for wanting to CFLAG rice with Gentoo. They're all running Intels and Intel doesn't get anything out of using those instructions.
Meanwhile, over in AMD land, I'm seeing things getting done twice as fast or 60% faster or whatever.
Intel is going to kill x86 by trying to shoehorn an architecture with a CISC philosophy of making new instructions for performance into competing with a RISC architecture by ignoring what makes CISC so strong and pushing CISC into a market where it doesn't belong.
This explains so much why Intel doesn't bother with AVX/FMA/etc on Atom while AMD supports all of that on Jaguar. Intel's AVX/FMA/etc implementation sucks and AMD's is good.
Oh god, the irony of this all. No wonder Intel wants to shove x87 benchmarks in front of everyone''s faces instead of going "look at the new instructions in Haswell! ITS GIVES A 50% SPEED UP!!!!"
Really starting to think IB/SB/Haswell/etc just flat out suck and are horrible designs, but Intel has enough money to "polish a turd"