AMD CPU speculation... and expert conjecture

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juanrga

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This time I include your first try to answer and your second try to answer. It is interesting to see how your answers evolve over time, but continue showing the same disparity with what AMD says.

AMD: K12 is a new high-performance ARM-based core.
8350rocks (1st try): No. K12 != ARM.
8350rocks (2nd try): K12 is not ARM only, that was my point.

AMD: The TAM for x86 is decreasing, while it's increasing for ARM.
8350rocks (1st try): No. The TAM for x86 is increasing and it is gaining ground against ARM.
8350rocks (2nd try): HEDT is growing.

AMD: ARM and x86 cores will be treated as first class citizen. ARM will win over x86 in the long run.
8350rocks (1st try): No, AMD considers ARM will be a niche market.
8350rocks (2nd try): http://www.anandtech.com/show/6536/arm-vs-x86-the-real-showdown/14

AMD: We will abandon CMT and will return to classic SMT design.
8350rocks (1st try): No. AMD new cores will be based in a redesigned CMT architecture (note: CMT is a version of SMT).
8350rocks (2nd try): I said specifically, "AMD will not use HTT".

AMD: We promise 10TFLOP APU by 2020
8350rocks (1st try): No. AMD cannot produce a 10 TFLOP APU for doing anything right now
8350rocks (2nd try): LOL...right...10 TFLOP APU...ok...I will believe that when I see it...

Sony: only six cores are available to games two cores are reserved by OS and for background/dev tasks
8350rocks (1st try): No. Eight cores are fully available to games because the OS is run in a separate chip.
8350rocks (2nd try): No source from you...and my SDK says ALL 8 CORES are available for game loads...

Sony: Jaguar cores are clocked at 1.6GHz
8350rocks (1st try): No. Jaguar cores are clocked at 2.75GHz.
8350rocks (2nd try): I said the patents registered mentioned the highest frequency on the APU to be 2.75 GHz. Additionally...the PS4 is clocked about 2.0 GHz...so your prediction was wrong. Where is your crystal ball now?
 

juanrga

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Intel purchased an ARM license. Some analysts suggest Intel would make ARM chips

http://news.investors.com/112713-680879-intel-stock-gets-downgrade-from-rbc-capital-markets.htm

other analysts suggest that Intel would abandon mobile:

We continue to believe Intel will lose money and not gain material EPS from tablets or smartphones due to the disadvantages of x86 versus ARM and overall low profitability of the tablet and handset processor market. If Intel were to shut down its mobile business, we estimate it could unlock roughly $0.50 in 2015 EPS.

http://www.eetimes.com/document.asp?doc_id=1322263
 

juanrga

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(i)
I am working in an article about how the chips of year 2020 will be. The stuff is very interesting, because includes a change of paradigm in the architecture of computers, and I decided to share my knowledge about that in this thread, adding also some details about AMD future plans and about related plans from Nvidia and Intel.

(ii)
I provided some math/phys relevant details such as the ratio of local compute to data movement for current silicon and the ratio for future silicon showing why a dGPU doesn't scale up and has to be rejected.

This derived in some posts ranging from the educated "I don't think so" to the usual ad hominem by the same guys of always.

(iii)
Then I decided to share some quotes of real experts disagreeing with the laughable comments from the last guys. Dongarra is a famous HPC expert, but the Nvidia Research Team is also behind the gaming Geforce cards.

(iv)
The same arguments apply to gaming. The only difference with HPC is on the order of magnitude of the problem associated to the nonlinear scaling of the future silicon.

I explained that gaming is evolving towards using the GPU also for compute (e.g. physics or AI). Once you are using the GPU for compute you have to confront problems that are very similar to those mentioned for HPC.

(v)
I explained that GPUs for gaming are not designed in a vacuum. The disappearance of the top-end discrete GPUs used for compute will affect the development of the cheaper gaming GPUs. The explanation is the same that I used here to predict that AMD wouldn't release Steamroller FX CPUs once the server roadmap was made public and it showed the cancellation of Steamroller Opteron CPU.

The same people who didn't understand then my argument and said me "wait for the desktop roadmap" is the same people who doesn't understand my argument now and believes that discrete GPUs for gaming will be released even after the Sun disappear. :sarcastic:

(vi)
There is no serious problem with 250W sockets. AMD is already selling 220W CPUs and you can find 300W coolers in the market. Moreover the expensive 200--300W APUs that are being designed for exascale supercomputers don't need to be reused for gaming, in the same way that expensive 150W Xeons used in fastest supercomputers are not found in gaming PCs.

(vii)
Beyond my HPC sources, I also have relevant sources from gaming and rendering communities. E.g. I have material from a very well-known guy and he agrees with me on that GPUs for gaming will disappear. Not only we agree on this, but we also agree on how will be the gaming hardware that will replace the GPUs. He is already thinking on new advanced algorithms/code that will be used for the future games. But this is material reserved for my future article, now it is time to watch the possible funny reactions of the many 'engineers', 'game-developers', and Mr-I-have-a-friend-at-AMD in this thread.
 

juanrga

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Thanks you for the support and the nice words.

I am sorry to inform that I will not write any article about Carrizo. In the first place I will be busy preparing the article mentioned before. In the second place, there is no enough info about Carrizo to write a half-decent article. The only information are (i) very old slides about performance and efficiency, which probably mean nothing now due to changes in foundries process and other changes, (ii) scarce details inferred from the bdver4 patches introduced in GCC, and (iii) a supposed leaked die-shot that some people initially believed was Steamroller and that now them believe is Excavator, but I don't think is excavator.

My only comments about Carrizo and my estimation of its performance compared to Kaveri are those found in this thread.
 

juanrga

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The original claim was that AMD was replacing jaguar by ARM in servers. Since then you have always omitted the last part and any of my corrections or further claims are either ignored by you or misinterpreted.

Same situation now. I have not predicted that puma+ is the future. I have said something completely different, but this time I don't even bother to explain to you, because you will reply with another new misunderstanding or partial quotation.

You claim that this thread has become useless, but it is still interesting enough for you to watch it and to post here, except when you were banned by posting personal attacks after being warned by mods.



You are just inventing things again.

I first provided you a technical analysis of the content of the paper. You didn't answer anything of it.

After analyzing the content of the paper, I was curious about how they could write something so wrong as that (specially when all the 'mistakes' seem to give advantage to Intel chips) and I did search info about the authors. I found that the top author is linked to Intel, which includes receiving grants fro Intel and having one Intel lab guy co-working in his research group.

Of course, I am not the only one who has stated disagreement with the methodology and conclusions of your beloved paper, but ssshhhh! I will better leave you thinking otherwise. :sarcastic: (*)

I know a 'bit' about peer review process and not everything published is correct. There are even cases of fraudulent papers that passed the strongest peer review processes. Thus I laugh at your but-it-was-reviewed argument.

(*) I reconsidered my position and I will quote other analysis of your beloved paper. like this:

While the paper is quite interesting overall, they make so many estimates and assumptions that the inaccuracies introduced seem large enough to hide ISA effects. A few other oddities that stood out:

1. Die size estimates are spectacularly wrong. Eg. A9 die in Tegra 3 is just 1.9mm^2 in 40nm, or less than a quarter of what they claim.
2. Why use ancient A8, and, worse, a Beagle board? For a 2013 paper you'd expect at least 2012 hardware.
3. It would have been more interesting and relevant to compare A9, A15 and Z2460 in actual devices (say S3, Chromebook and XOLO). That also standardizes everything to 32nm and means far less estimation is required to normalize.
4. CPU power is estimated by (active system power - idle system power). This includes the DRAM active power of course, which on low power CPUs is a much higher percentage of the total power (for the i7 this is partially offset by using 16GB). Similarly a huge L2/L3 would be counted as idle power, so you only measure the performance upside, not the power cost.
5. Rather than using estimates to normalize on frequency, why not do actual voltage scaling at a lower frequency?
6. With SSE rather than x87 the instruction counts would be even more similar as SSE also uses libraries for transcendental functions.
7. Who still uses ARM rather than Thumb-2 these days?
8. GCC 4.4?
9. CPI results look wrong. A9 executes more instruction than x86, and needs fewer cycles than the Atom, so Atom has a lower CPI?!? That doesn't compute...

or this reply to point 8.

> 8. GCC 4.4?

They claim 'Compiler doesn't matter' which is demonstrably false even for x86. When GCC was originally looking at Atom optimisation the resulting code when executing on an Atom the difference in speed between what it had been generating generating for Core 2 and Atom optimised code was up to 20%.

or this one from a student at same university than the author:

I'm a student at this university and have been listening to revisions of this talk/paper for over a year. My initial impression "Ahh, Karu is trying to cash in on the ARM vs x86 hype to get a paper". My current reaction "Man, reviewers are dumb. Oh well, I guess Karu got his paper".

As others have noted, they wave their hands and at the end claim the ISA makes no difference. That might be the right conclusion, but their data doesn't really back up that claim.

I agree with his opinion on the reviewers.
 

juanrga

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You don't need to apologize. The paper is clearly deficient, but you can think otherwise. ;)
 

lilcinw

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i-iv: I have been following this thread series since the Bulldozer speculation. I have read all of the commentary you and others have given. As you point out the localization issue is an order of magnitude apart for HPC and gaming workloads. I would argue then that gaming will require localization 5-10 years after HPC.

v: GPUs aren't designed in a vacuum but neither will GPU development stop when APUs begin to dominate the market. The shader block designs are shared between APUs and GPUs currently and will probably continue to be. AMD is accustomed to producing multiple GPU dies already. If I am not mistaken each generation released relies on three different die configurations to enable the various price points to be met. They generally rely on a monolithic die to meet the needs of a processor family. Even if (when) the lower class GPU dies are rendered redundant by APUs the top tier will still yield a desirable product line for some time.

vi: Yes AMD is selling 200w CPUs. You can use it if your motherboard and power supply are on an approved list and you have adequate cooling. That cooling had better be of the liquid variety if you want to be in the same room as your gaming rig without ear protection. Of course no one will 'need' a 300w APU (no one 'needs' a gaming PC) but that doesn't mean customers won't want or be willing to pay for it. I spent ~$650 on CPU/GPUs for an upper-mid range gaming rig. That is mid range Opteron pricing. Oh and regarding the 150w Xeon.. I have seen more than a few builds based on these recycled Xeons.

vii: Source? I will always take a look at someone's perspective on the future of computing/gaming. Even if I ultimately disagree with it.

 
i-iv: I have been following this thread series since the Bulldozer speculation. I have read all of the commentary you and others have given. As you point out the localization issue is an order of magnitude apart for HPC and gaming workloads. I would argue then that gaming will require localization 5-10 years after HPC.

v: GPUs aren't designed in a vacuum but neither will GPU development stop when APUs begin to dominate the market. The shader block designs are shared between APUs and GPUs currently and will probably continue to be. AMD is accustomed to producing multiple GPU dies already. If I am not mistaken each generation released relies on three different die configurations to enable the various price points to be met. They generally rely on a monolithic die to meet the needs of a processor family. Even if (when) the lower class GPU dies are rendered redundant by APUs the top tier will still yield a desirable product line for some time.

Juan has a very poor understanding of what "locality" is, and I believe you do to. All it means is that the latency of a particular circuit is incredibly low due to it being on the same die. In the case of dGPU's vs iGPU's we get into a particular quandary. Anything you can do on the iGPU you can do 4~5x of on a dGPU, this relates to everything from vector processing power to memory access speeds / bandwidth. In order for a iGPU to be "better" then a dGPU the workload would have to be small enough that it would be complected in less time then it takes the dGPU to receive it.

Ex
100 instruction sets, 3 cycles each (load, execute, store) = 300 total instructions
iGPU: 2 per cycle with 1 cycle latency per batch
dGPU: 10 per cycle with 5 cycle latency per batch (500% more latency then iGPU)

iGPU = 50 batch's (50 total cycles used in latency) = (50 * 3) +50 = 200 cycle total execution time
dGPU = 10 batch's (50 total cycles used in latency) = (10 * 3) +50 = 80 cycle execution time

2 instruction sets, 3 cycles each (load, execute, store) = 6 total instructions
iGPU: 1 batch (1 total cycle used in latency) = (1 * 3) +1 = 4 cycle total execution time
dGPU: 1 batch (5 total cycle used in latency) = (1 * 3) +5 = 8 cycle total execution time

In the first instance the instruction load was big enough to fill the entire dGPU and take advantage of it's larger resources. The 500% increased latency is a big factor in it's total performance (30 execution cycles vs 50 latency) yet due to it's 5x higher throughput it still easily beats the integrated option. In the second instance there was a much smaller set of instructions because we need the results back before we can branch to the next segment of code. In that scenario we are unable to take advantage of the higher performance of the dGPU and the iGPU becomes the better option.

This is what we are talking about when we mention that dGPU's won't be replaced. In larger workloads they are significantly superior to the iGPU's due to them having larger heat and space constraints. The iGPU's only pull ahead in small quick workloads when you need the results of the calculation ASAP.
 

juanrga

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Today APUs cannibalize the low-end dGPU market and will continue to do. But in future APUs will cannibalize the top-end as well. As mentioned by experts as Dongarra, the discrete GPUs don't scale up and will be replaced by APUs for exascale-level supercomputers. The APUs designed by Nvidia, AMD... for exascale are not designed for replacing some low-end dGPU, but for replacing their top-end products, because no future dGPU could scale up to the required performance level for those future supercomputers.

CMT based APUs and CPUs also share many design blocks, but by economic reasons explained before AMD is not releasing any Steamroller FX series for desktop once the server products were canceled.

AMD is releasing Steamroller modules in Kaveri APUs for desktop and Berlin APUs for servers. But is not reusing those modules for any 4/6/8 core FX Steamroller because the development and manufacturing cost is too high. In the past those FX-series were released because part of the cost was shared by the more expensive server parts. Once those Opteron CPUs were gone, the associated FX-series were gone as well. People here didn't believe me when I predicted still time and roadmaps gave me the reason.

Some people signed a public plea for AMD to reconsider its position and release an Steamroller FX CPU. People who signed not only don't seem understand basic economy, but they seem unaware that designing those chips, tapping out, fabricating them, and shipping them would take years and by then Steamroller arch would be outdated.

Same situation about future discrete GPUs. They would share design blocks with sister APUs, but the development and manufacturing cost will be too high and the discrete cards will be canceled in future. No today, no tomorrow, no the next year, but it will happen in the end.



I have first to ask him what parts can quote and what part cannot. I will do for the article under preparation.
 

juanrga

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Nice answer but there are at least three problems with it:

The first problem is that you continue misunderstanding the main point. The principle of locality identified in exascale research is derived from the power wall problem associated to the nonlinear scaling of the required silicon. It is not derived from latencies associated to integration. Thus all your discussion about latency is useless because the problem that I am mentioning is qualitatively and quantitatively different.

The second problem is that your discussion about latency is wrong because you continue doing incorrect extrapolations from current APU/dGPU designs that don't apply to the new future designs. E.g. you are considering a throughput ratio of 5x, when the Nvidia die diagram clearly show that the best ratio will be 9/8 = 1.125x for the future designs. As I showed before, the 1.125x better throughput of a future discrete GPU is completely exceed by the dCPU--dGPU interconnect, which results on the future APU being faster than the future discrete GPU. Since the APU will be faster, the Nvidia engineers are not wasting their time in the design of any discrete GPU for their future top product.

The third problem is that I am not alone in my 'ignorance', but in the good company of any expert in HPC/GPGPU... like the mentioned research team of the quote that you ignored and deleted in previous posts. As I said before you don't need to convince me of anything. You need to convince to the engineers that design the GPUs. You need to meet them, explain them why are wrong and then convince them to abandon their plans and designs. :sarcastic:

In short: your answers continue misunderstanding what I am really saying, continue repeating the same mistakes corrected before, and continue ignoring the quotes from experts that openly disagree with you.
 

juanrga

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I have been for months mentioning that ARM is optimized for efficiency, not for low power consumption, and that this efficiency optimization means that ARM chips can provide more performance than x86 chips consuming the same power. As usual some 'experts' in this thread disagreed with my claims, but real experts (including the guy who invented x86-64) agree with me:

Jim Keller, head of core development (and one of the original Hammer designers), said he came back to AMD because he loves processor design and "AMD was taking a big swing." He also talked about starting with lots of "clean pieces of paper," but said that while the engineers were excited to be doing something new, they were not starting from scratch. He said the team has the world's best graphics, and knows how to do high-frequency designs, servers, and scalability. One interesting point dealt with developing a new on-chip fabric for connecting the different parts of the system, with Keller suggesting that Project Skybridge will use a "cousin" of the company's existing fabric, while the team was creating a new fabric for 2016 and beyond that would extend to SoCs and servers.

He said the ARM instruction set has inherent efficiencies, which allows the design to use fewer transistors for decoding instruction and thus have more for delivering performance.

I was hoping we'd hear about a new high-end x86 core since there hasn't been a completely new performance or server core from AMD in several years, but the company didn't announce one. However, Papermaster said the company will not "let the foot off the gas in x86" and Keller said his team got some new ideas for the next x86 core by working on the ARM core design. "Every architect kicks himself for the last thing he did," he said, saying the team would take what they learned in creating the ARM core and apply it to the next x86 design.

Very interesting the last part. Keller team is using some ideas from their high-performance ARM core in the design of the high-performance x86 sister core.
 

jdwii

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yeah i was just going to show that ha ha i can't wait it has a high clock rate and the IPC is higher as well this should be a nice chip. Under my testing i noticed that kaveri is on average 15% faster in performance per clock compared to my phenom using several real world programs such as dolphin emulator(very single threaded)
 

etayorius

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Yes, it seems Kaveri at 3.7Ghz (without turbo) is in fact faster (clock for clock) against PhenomII at 3.7Ghz for about 10% Faster, and up to 25% faster with Turbo Enabled, the only area where the PhenomII beats Kaveri is in regards to "CPU Physics" (Less than 10%) in favor of Phenom, but "Integer Math", "SSE Instruction", "CPU Compression" and "CPU Sorting", Kaveri Leads by a huge margin, they basically tie in "Floating Point Math", "Prime Numbers" and "Encryption" (Kaveri a few 1-2% Ahead which is the margin error).

Overall Kaveri 7850k is faster than PhenomII, even Skyrim seems to run 10% faster on Kaveri with both CPUs running at 3.7GHz, with turbo Kaveri gets a 20-27% lead, which is quite good... but i could OC the PhenomII up to 4.2GHz and it would basically pull ahead Kaveri (Non OC), so i may just wait till Carrizo or whatever comes after... MANTLE basically gets rid of CPU bottleneck which makes CPU a little less irrelevant... getting a faster Radeon GPU will basically drive performance without worrying about the CPU that much, even a mere 7850k with a 290X was able to pull an amazing 45% increase with MANTLE on BF4, and even the FX8350 manage to get a very nice increase at 1920x1080 with MANTLE on a Tek Syndicate video:

https://www.youtube.com/watch?v=IgrAP2_GfOo

Basically... most older CPUs will do until AMD comes with something good, DX12 will pull these even further and make it more mainstream.
 

truegenius

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whatever medicine you are on, you have to reduce the dose
and check if your crystal ball belongs to our world or some other parallel universe
this may help you
hallucination
noun
an experience involving the apparent perception of something not present.

palladin9479 said:

Juan has a very poor understanding of what "locality" is, and I believe you do to. All it means is that the latency of a particular circuit is incredibly low due to it being on the same die. In the case of dGPU's vs iGPU's we get into a particular quandary. Anything you can do on the iGPU you can do 4~5x of on a dGPU, this relates to everything from vector processing power to memory access speeds / bandwidth. In order for a iGPU to be "better" then a dGPU the workload would have to be small enough that it would be complected in less time then it takes the dGPU to receive it.

Ex
100 instruction sets, 3 cycles each (load, execute, store) = 300 total instructions
iGPU: 2 per cycle with 1 cycle latency per batch
dGPU: 10 per cycle with 5 cycle latency per batch (500% more latency then iGPU)

iGPU = 50 batch's (50 total cycles used in latency) = (50 * 3) +50 = 200 cycle total execution time
dGPU = 10 batch's (50 total cycles used in latency) = (10 * 3) +50 = 80 cycle execution time

2 instruction sets, 3 cycles each (load, execute, store) = 6 total instructions
iGPU: 1 batch (1 total cycle used in latency) = (1 * 3) +1 = 4 cycle total execution time
dGPU: 1 batch (5 total cycle used in latency) = (1 * 3) +5 = 8 cycle total execution time

In the first instance the instruction load was big enough to fill the entire dGPU and take advantage of it's larger resources. The 500% increased latency is a big factor in it's total performance (30 execution cycles vs 50 latency) yet due to it's 5x higher throughput it still easily beats the integrated option. In the second instance there was a much smaller set of instructions because we need the results back before we can branch to the next segment of code. In that scenario we are unable to take advantage of the higher performance of the dGPU and the iGPU becomes the better option.

This is what we are talking about when we mention that dGPU's won't be replaced. In larger workloads they are significantly superior to the iGPU's due to them having larger heat and space constraints. The iGPU's only pull ahead in small quick workloads when you need the results of the calculation ASAP.
can we do something like this ?
predict the amount of processing required for a set of data
and then use igpu for small and if the data is big then send it to dgpu
this way we can get best of both world
something like intel quicksinc as we can use igpu's quicksinc for video conversion and dgpu for gaming
 

juanrga

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Some benchmarks of movile Kaveri against Haswell ULV

http://wccftech.com/amd-kaveri-mobile-apus-vs-ulv-haswell-benchmarks/

Nice to see benchmarked the FX APUs that I mentioned are coming
 

juanrga

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Well, my broken crystal ball was predicting some funny reaction in this universe, true?

Thanks by the quote. I hope the next quote can help you to understand your reactions to what the experts on gaming claim:

Sometimes people don't want to hear the truth because they don't want their illusions destroyed.
 


I only have a friend from college that works at Intel but I haven't talked to him in a long time. Then again I do live just about 1.5 hours south of one of Intels largest FABs.



We are going to leave this off here. No need to bring up the past with something both Intel and AMD have settled on. As well it was a exclusivity contract, which is done by a lot of peoples most commonly visited businesses.



You are actually way off. THGs average reader is a enthusiast who enjoys hardware and building/modding PCs. Go look at the custom rig threads. And yes the majority are also gamers but not in the sense you are portraying.

As well, how many average people with normal jobs will have the money to buy a HPC?

On that same note, how many times has a HPC change affected a consumer desktop change? AMD used to design their CPUs with server in mind then trickle that design down to consumer end desktops. Currently Intel does that with their high end, X79 LGA2011 is server design and has consumer level features but they have a separate consumer level only with the Zx7 and LGA1150.



It is called marketing. Go ahead and try to remember the last AMD commercial you say on TV vs the last Intel. Do you remember Intel little jingle? I do. Intel has always had better marketing and thanks to that people think more of them and think of AMD as a cheap knock off.

I have had to explain to people that AMD is a decent brand, just that they are a smaller company.



I am not sure I will like those benchmarks. They are leaving out a few things I would love to see. I hope they include the 17w i7 CPUs, not sure why they wouldn't. I would also like to see the i7 CPUs with Iris Pro against it to get a good idea. Sure those i7s are 47w TDP parts but it would be a good challenge to see if AMDs 35w TDB on their current 32nm is decent vs a higher 22nm TDP part.

As well I would love to see the performance difference between them. But at minimum I would want to see the 17w TDP i7s. There is no reason to not have them unless those slides are the usual AMD marketing slides where they include only what they look best against.

Anyone else remember the AMD Bulldozer marketing slides that for one application compared it to Sandy Bridge then the other to Sandy Bridge-E?

I really hate marketing slides....
 

one of the reasons i7 cpus were left out could be the price range of amd's laptop apus vs intel's. intel's quad core laptop cpus are actually 4c/8t cpus with the largest amount of llc and often with unlocked sku and with gt3/e igpu. intel price their quad cores in the $300-500+ range. mobile kaveri's competition would be core i5 and lower. fortunately for amd, kaveri's igpu can easily outperform core i5's hd4600. although, it remains to be seen if mobile kaveri also throttles like it's predecessors on load..... or if oems bother to build good cooling systems for amd laptops.

 

lilcinw

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The line was intended to be a facetious oversimplification to make a point. I would be very surprised if a significant portion of THG readers used their GPU for anything other than gaming on a regular basis.

The discussion is about the benefits of moving the GPU onto the CPU die. Until the x86 cores are less than ~20% of the total die area I think performance will be too constrained and that enthusiasts will prefer discrete solutions.
 


It is not hard to mention the price difference in the article though. While I know a i7 4960X is a $1K+ CPU compared to the FX-8350s sub $200 price, I still would like to see the performance difference.

And while it will have its range of competition, it still doesn't show what has the best per core/watt performance or what has the best performance.

It is just nice to have all the answers. Not everyone wants the best performance/$ only and may want to know what is the best performer per watt. A 17w TDP i7 may perform better in certain ways and still give equal to or better power numbers and for that person would be that answer. Then there are the /$ people who are normally going to go with AMD because AMD tends to have the best performance/$.



It will probably be cheapest when it becomes more heavily used in desktop as well. I would think Broadwell but more realistically Sky Lake will have the eDRAM feature which is what makes Iris Pro so nice.



Most people who buy a gaming grade dGPU are going to game. There are a few who will try to mine crypto currencies (pointless as most of them have ASICs now) and others who may do F@H in their spare time (workstation dGPUs are better for this on a performance/w).

As I said, most THG readers (I do not count the ones who come now and then, I mean the more dedicated people) are enthusiasts who do enjoy gaming but enjoy discussing the hardware and how it will affect the future.

Will we eventually see a powerful GPU on die? Absolutely. I think it is further off than people think though, as it has been said the biggest issue is moving all that extra heat that a dGPU with even GTX680 performance would create.
 
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