cdrkf :
The problem is basically related to *how long it takes* to design and the launch a processor core. It's probably 5 years from planning, through design, to testing, tweaking and final product launch. Once you have your design, then you implement improvements for the next few years (stage AMD is currently at). Point was they didn't realize Bulldozer was the wrong way to go until it was too late- and now they are having to do the best they can with what they've got. I have noticed though they've managed to get the performance greatly improved a lower wattage, the 'dozer' designs appear to fall over when going for outright performance but based on Kaveri the improved SR core isn't actually *that bad* when running at more modest frequencies (probably a result of process).
It is about both cost and time. According to AMD a top server x86 chip on a new microarchitecture takes them three or four-year time frame and $300--400 million in development costs.
If the new arch will be ready by 2016, subtract four and you get 2012, that is just when Keller joined AMD.
cdrkf :
I think there is more hope for the next get core from AMD, after all they do have Keller working on it. I know Juranga is worried however many cores is making more sense now than it did when Bulldozer came out and Keller is no fool. The idea with bulldozer was to provide 80% of the ipc of Intel, but with better multi-core scaling so that in theory it *should* have been faster than Intel in well threaded loads. Problem was the design was late, the process wasn't up to it and the end result was it was 90% of Intel speed in multithreaded loads (it's strength) and fell over in single thread. I mean the other thing is Bulldozer would have looked *much much better* if it was released about 18 months sooner (when it was supposed to be launched). Then you would have had PD vs Sandy (not Ivy), SR against Ivy, and EX vs Haswell (however the latter wouldn't have worked due to the process available to them).
Will be interesting to see what happens anyway
The problem with Bulldozer wasn't "too late", neither SOI hype, neither few multithreaded software. All that helped to the fiasco of course, but the problem with Bulldozer was that
the whole design was nonsensical and internally inconsistent. The Faildozer design was targeting one thing and the contrary, the microarchitecture was optimized for one thing and for the contrary, with a final result of excelling at none.
The HSA specification is pretty clever:
CPU for latency and GPU for throughput. This was already in the former FSA spec (aka Fusion). But genius working then at AMD considered a good idea to replaced a big core with two smaller cores to produce a CPU with more throughput; this reduced IPC, which then was compensated by higher frequency target; however, this increased power consumption by roughly a cubic dependence. More throughput requires more bandwidth; however, AMD provided a weak memory controller and weak cache subsystem that couldn't feed all the cores adequately. Moreover, AMD did pretend to compete by selling cheaper, thus big dies were not an option and AMD simplified the module front end for reducing transistor count, but this introduced a throughput penalty of about 20% and, at same time, did build the 12/16 core Opteron using dual-dies on MCM package. This packaging reduced performance and increased power consumption further compared to a monolithic 16-core die. Moreover for saving costs AMD relied on automated design tools (even for critical paths of the module) what increased transistor count by about 30%, increasing die size, power consumption, and cost by a similar amount.
Add to this the shared weak FPU within a module, because the original idea of Fusion was to use GPGPUs as external Floating Point unit, but this requires a good interconnect and AMD only provided PCIe2 support (this did make they lost Cray as customer due to lack of PCIe3 support for Opterons). Moreover AMD designed GPUs that were far from optimal for compute (VLIW is good a graphics but bad at compute), add sh*t drivers and the result is Nvidia owning a 85% of HPC/GPGPU market. Only recently new GCN arch from AMD is providing competition in this area.
In short, the whole Bulldozer design was in the middle of nowhere, slower at single thread than a CPU but with poor throughput than a true CMP design, ridiculous FP performance, unable to feed GPGPUs to exploit Fusion, power hungry, big, and costly,... AMD had to sell them for 'free' and getting into red numbers, they lost the server market and the HPC to ridiculous market share of 3% and so, even when typical apps are very well threaded (Intel sells
36 threads Xeons).
With Steamroller AMD corrected the shared decoder and eliminated the 20% penalty. With Excavator would introduce a double size FPU to correct the weak FP performance and tweak other serious defects of the CMT architecture, but that is not happening.
I mentioned above that my last info was that AMD FX series would make a comeback with 8/12/16 cores for 2017 and why this smell as another fiasco, but recent rumors are even poor. Now the rumor is 20-cores FX CPU
http://wccftech.com/amd-16nm-opteron-fx-processors-possibly-upto-20-cores-2016-2017/#ixzz3A47tgNYc
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