AMD CPU speculation... and expert conjecture

[8350rocks]

I would not be surprised if the 8370E is just 9590 silicon downclocked to reduce TDP and being sold to move the silicon. Considering that the 9590 was effectively golden binned 8350s, I like to think AMD did quite well maximizing margins on that silicon for those who were willing to pay to get it.

Considering the 9590 now costs less than a 4670k...it is actually a really decent option now...

 

[de5_Roy]

amd did very well considering 9590's launch price. i feel sorry for the people who bought those at launch. from the latest round of price cuts, the 9370 actually looks like a good amd-alternative to an i5. 9590... may be good for people who want 4770 non-k's multithreaded performance on the cheap. i'd recommend the i7 or a xeon 12xx v3 though.

the best value chips are fx6300 and a8 7600. the upcoming athlon x4 860k looks quite good too. instead of getting a dual module fx, people can opt for the sr-b cores in the athlon at similar price. and, you can build a small amd dgfx gaming box with the athlon and a mini itx socket fm2+ motherboard on the cheap, without paying way too much for something like a 7850k. i am really looking forward to what the new prices and the new athlon bring to value segment.
i hope t.h. pits the new athlon against the pentium a.e. in an overclocking-oriented article.

 

[truegenius]

Spoiler

PS4 GPU has an Effective Bandwidth of 120 to 140 GB/s, Not 176 GB/s As Previously Reported
http://wccftech.com/sony-ps4-effective-bandwidth-140-gbs-disproportionate-cpu-gpu-scaling/
i assumed this type of throttling won't happen until amd or arm put 8x arm a57 or carrizo/high clocked jag/puma cores in an apu/soc like that. then again it's wcantcomprehendyetpublishanalysisontech..... sony needs to put in a stronger cooling system in the ps4, if this is true.

any overclocker and bench'er will say that its so pure "dumb"

many months ago, i posted some benches of real world memory transfer speed obtained, which showed that my hd6770 was 80% efficient, and i was complaining that phenom's is very less efficient ( 60% )

theoretical bandwidth does not mean that you will get that much bandwidth in real world, the bandwidth you will get will depend upon efficiency of the components that is accessing memory and and are controlling memory

So perhaps a weak memory controller? On my 8350fx with 1866mhz ram i get this although for the theoretical limit should be 32Gb i think. Man running that i can tell Amd needs to redo their L3 cache big time.

Testing memory speeds with a single threaded program is a very bad way to go about it, all it does is test how good the cache is at prediction. Best way to test is multiple independent memory copies happening simultaneously. Create an imaginary 10GB data source, split it into four 2.5GB chunks then do four bulk copies at 16MB block sizes. Should completely bypass all cache and prefetch checks on all systems and give you an absolute memory bandwidth. This is important because while the CPU tends to access memory in a serial fashion, GPU's access it in very large bulk transfers in parallel. So just because a single thread on the CPU gets ~60% cache efficiency doesn't mean the GPU would get the same, especially since the GPU doesn't use the CPU's caching mechanism at all. In the case of AMD uArch's, the limiter on memory access isn't the IMC but the prefetcher. The IMC will sit there idling waiting for the prefetcher to tell it to get something.

newest aida64 4.6 uses all cores when testing memory bandwidth, l2 cache, l3 cache. It only use single thread during latency testing and l1 cache testing

and in phenom 2, if we overclock nb then it will improves memory and l3 cache bandwidth and latency thus it surely limiting memory by some amount

The new 95watt 8370E is a very interesting addition to the FX line. Considering how well the 8320/8350s overclock, I am excited to see how far someone can push the 8370E with that extra room with regards to reduced TDP.

considering their trend of low power chip, i think that 8370e will be multiplier locked
thus we will need to mess with bclk to overclock it
not a big problem though as we can change bclk/fsb of am3+ easily

 

[cdrkf]

Spoiler

PS4 GPU has an Effective Bandwidth of 120 to 140 GB/s, Not 176 GB/s As Previously Reported
http://wccftech.com/sony-ps4-effective-bandwidth-140-gbs-disproportionate-cpu-gpu-scaling/
i assumed this type of throttling won't happen until amd or arm put 8x arm a57 or carrizo/high clocked jag/puma cores in an apu/soc like that. then again it's wcantcomprehendyetpublishanalysisontech..... sony needs to put in a stronger cooling system in the ps4, if this is true.

any overclocker and bench'er will say that its so pure "dumb"

many months ago, i posted some benches of real world memory transfer speed obtained, which showed that my hd6770 was 80% efficient, and i was complaining that phenom's is very less efficient ( 60% )

theoretical bandwidth does not mean that you will get that much bandwidth in real world, the bandwidth you will get will depend upon efficiency of the components that is accessing memory and and are controlling memory

So perhaps a weak memory controller? On my 8350fx with 1866mhz ram i get this although for the theoretical limit should be 32Gb i think. Man running that i can tell Amd needs to redo their L3 cache big time.

Testing memory speeds with a single threaded program is a very bad way to go about it, all it does is test how good the cache is at prediction. Best way to test is multiple independent memory copies happening simultaneously. Create an imaginary 10GB data source, split it into four 2.5GB chunks then do four bulk copies at 16MB block sizes. Should completely bypass all cache and prefetch checks on all systems and give you an absolute memory bandwidth. This is important because while the CPU tends to access memory in a serial fashion, GPU's access it in very large bulk transfers in parallel. So just because a single thread on the CPU gets ~60% cache efficiency doesn't mean the GPU would get the same, especially since the GPU doesn't use the CPU's caching mechanism at all. In the case of AMD uArch's, the limiter on memory access isn't the IMC but the prefetcher. The IMC will sit there idling waiting for the prefetcher to tell it to get something.

newest aida64 4.6 uses all cores when testing memory bandwidth, l2 cache, l3 cache. It only use single thread during latency testing and l1 cache testing

and in phenom 2, if we overclock nb then it will improves memory and l3 cache bandwidth and latency thus it surely limiting memory by some amount

The new 95watt 8370E is a very interesting addition to the FX line. Considering how well the 8320/8350s overclock, I am excited to see how far someone can push the 8370E with that extra room with regards to reduced TDP.

considering their trend of low power chip, i think that 8370e will be multiplier locked
thus we will need to mess with bclk to overclock it
not a big problem though as we can change bclk/fsb of am3+ easily

I'd be surprised as the entire FX seriese are unlocked by default......

 

[juanrga]

The new 95watt 8370E is a very interesting addition to the FX line. Considering how well the 8320/8350s overclock, I am excited to see how far someone can push the 8370E with that extra room with regards to reduced TDP.

Don't expect more than 300MHz over FX8350 average OC on air.

 

[logainofhades]

Considering the 9590 now costs less than a 4670k...it is actually a really decent option now...

No it does not, even with a Newegg promo, it costs more. And this is the one without a bundled cooler even.

PCPartPicker part list / Price breakdown by merchant

CPU: AMD FX-9590 4.7GHz 8-Core Processor ($259.99 @ Newegg)
Total: $259.99
Prices include shipping, taxes, and discounts when available
Generated by PCPartPicker 2014-08-22 10:56 EDT-0400

PCPartPicker part list / Price breakdown by merchant

CPU: Intel Core i5-4670K 3.4GHz Quad-Core Processor ($227.99 @ NCIX US)
Total: $227.99
Prices include shipping, taxes, and discounts when available
Generated by PCPartPicker 2014-08-22 10:56 EDT-0400




I would still go with a 1231v3, and an H97 board, over either of them, personally. The 9590 would make for a nice space heater in the winter though. I am as disappointed in AMD right now as I was in Intel during the crapburst days.

PCPartPicker part list / Price breakdown by merchant

CPU: Intel Xeon E3-1231 V3 3.4GHz Quad-Core Processor ($247.98 @ SuperBiiz)
Total: $247.98
Prices include shipping, taxes, and discounts when available
Generated by PCPartPicker 2014-08-22 10:56 EDT-0400

 

[cdrkf]

Considering the 9590 now costs less than a 4670k...it is actually a really decent option now...

No it does not, even with a Newegg promo, it costs more. And this is the one without a bundled cooler even.

PCPartPicker part list / Price breakdown by merchant

CPU: AMD FX-9590 4.7GHz 8-Core Processor ($259.99 @ Newegg)
Total: $259.99
Prices include shipping, taxes, and discounts when available
Generated by PCPartPicker 2014-08-22 10:56 EDT-0400

PCPartPicker part list / Price breakdown by merchant

CPU: Intel Core i5-4670K 3.4GHz Quad-Core Processor ($227.99 @ NCIX US)
Total: $227.99
Prices include shipping, taxes, and discounts when available
Generated by PCPartPicker 2014-08-22 10:56 EDT-0400




I would still go with a 1231v3, and an H97 board, over either of them, personally. The 9590 would make for a nice space heater in the winter though. I am as disappointed in AMD right now as I was in Intel during the crapburst days.

PCPartPicker part list / Price breakdown by merchant

CPU: Intel Xeon E3-1231 V3 3.4GHz Quad-Core Processor ($247.98 @ SuperBiiz)
Total: $247.98
Prices include shipping, taxes, and discounts when available
Generated by PCPartPicker 2014-08-22 10:56 EDT-0400

Silly question but what is the advantage of the Xeon over the i5?

 

[juanrga]

Considering the 9590 now costs less than a 4670k...it is actually a really decent option now...

No it does not, even with a Newegg promo, it costs more. And this is the one without a bundled cooler even.

PCPartPicker part list / Price breakdown by merchant

CPU: AMD FX-9590 4.7GHz 8-Core Processor ($259.99 @ Newegg)
Total: $259.99
Prices include shipping, taxes, and discounts when available
Generated by PCPartPicker 2014-08-22 10:56 EDT-0400

PCPartPicker part list / Price breakdown by merchant

CPU: Intel Core i5-4670K 3.4GHz Quad-Core Processor ($227.99 @ NCIX US)
Total: $227.99
Prices include shipping, taxes, and discounts when available
Generated by PCPartPicker 2014-08-22 10:56 EDT-0400




I would still go with a 1231v3, and an H97 board, over either of them, personally. The 9590 would make for a nice space heater in the winter though. I am as disappointed in AMD right now as I was in Intel during the crapburst days.

PCPartPicker part list / Price breakdown by merchant

CPU: Intel Xeon E3-1231 V3 3.4GHz Quad-Core Processor ($247.98 @ SuperBiiz)
Total: $247.98
Prices include shipping, taxes, and discounts when available
Generated by PCPartPicker 2014-08-22 10:56 EDT-0400

Silly question but what is the advantage of the Xeon over the i5?

For ordinary desktop users? Hyperthreading and 33.3% more cache. For advanced users stuff such as ECC.

 

[palladin9479]

Spoiler

Spoiler

PS4 GPU has an Effective Bandwidth of 120 to 140 GB/s, Not 176 GB/s As Previously Reported
http://wccftech.com/sony-ps4-effective-bandwidth-140-gbs-disproportionate-cpu-gpu-scaling/
i assumed this type of throttling won't happen until amd or arm put 8x arm a57 or carrizo/high clocked jag/puma cores in an apu/soc like that. then again it's wcantcomprehendyetpublishanalysisontech..... sony needs to put in a stronger cooling system in the ps4, if this is true.

any overclocker and bench'er will say that its so pure "dumb"

many months ago, i posted some benches of real world memory transfer speed obtained, which showed that my hd6770 was 80% efficient, and i was complaining that phenom's is very less efficient ( 60% )

theoretical bandwidth does not mean that you will get that much bandwidth in real world, the bandwidth you will get will depend upon efficiency of the components that is accessing memory and and are controlling memory

So perhaps a weak memory controller? On my 8350fx with 1866mhz ram i get this although for the theoretical limit should be 32Gb i think. Man running that i can tell Amd needs to redo their L3 cache big time.

Testing memory speeds with a single threaded program is a very bad way to go about it, all it does is test how good the cache is at prediction. Best way to test is multiple independent memory copies happening simultaneously. Create an imaginary 10GB data source, split it into four 2.5GB chunks then do four bulk copies at 16MB block sizes. Should completely bypass all cache and prefetch checks on all systems and give you an absolute memory bandwidth. This is important because while the CPU tends to access memory in a serial fashion, GPU's access it in very large bulk transfers in parallel. So just because a single thread on the CPU gets ~60% cache efficiency doesn't mean the GPU would get the same, especially since the GPU doesn't use the CPU's caching mechanism at all. In the case of AMD uArch's, the limiter on memory access isn't the IMC but the prefetcher. The IMC will sit there idling waiting for the prefetcher to tell it to get something.

newest aida64 4.6 uses all cores when testing memory bandwidth, l2 cache, l3 cache. It only use single thread during latency testing and l1 cache testing

and in phenom 2, if we overclock nb then it will improves memory and l3 cache bandwidth and latency thus it surely limiting memory by some amount

The new 95watt 8370E is a very interesting addition to the FX line. Considering how well the 8320/8350s overclock, I am excited to see how far someone can push the 8370E with that extra room with regards to reduced TDP.

considering their trend of low power chip, i think that 8370e will be multiplier locked
thus we will need to mess with bclk to overclock it
not a big problem though as we can change bclk/fsb of am3+ easily

You got more cache performance when OCing the "integrated NB" because that's what controls access to the L3 and shared L2, it was also important if you were using it with memory faster then the IMC. And it doesn't matter how many threads you use, unless your block size is larger then the L3 cache then your just testing cache performance, which we all know Intel has a massive lead on.

Seriously IMC's aren't complicated, ever since they moved onto the CPU there isn't much difference between them. You pass them a request and they dispatch it to the memory then wait until it returns. No magic involved and no real way to "improve" them directly. Where once manufacturer gets better performance then another is in telling the IMC to go get data before you need it, aka prefetch / prediction. Now if we were discussing NUMA then that's where an IMC would get complicated as it would now have to manage getting data from other memory controllers vs just managing it's own two 64-bit channels. So pretty much every memory benchmarking tool is really just testing how good your processor is at guessing what's needed next and issuing the read command before it's needed and thus not wasting cycles on memory latency. Or looking far enough ahead to see that the same memory address you just read is going to be written and thus keeping it in cache so you only need to do one write vs a read - wait - write cycle. That btw is one of the reasons synthetics don't match up with real world performance, benchmarks are really easy to predict compared to normal software as they consist entirely of nested loops that do the same operations over and over again.

Though the memory read can't be as bad as you claim on the FX's, I just got 22GBps on my dual channel DDR3-1600 setup with a maximum theoretical burst of 25GBps. That is ~88% efficiency which is quite good considering how DRAM functions. If it was "40~50% worse" then the Intel platform was breaking the laws of physics and entering into quantum computing with it's 40~44GBps speeds on a 25GBps bus.

 

[logainofhades]

That particular one has hyperthreading like an i7, but costs $50 less and runs cooler due to no IGP. It will perform identical to an i7 4770.

 

[colinp]

The 9590 was never an option for me because a) I have a rig built inside a Silverstone FT03 case and the 9590 is only compatible with full ATX boards; and b) Even if the 9590 was compatible with some non-existant mATX 9-series board, I still wouldn't be able to easily dump 220W of heat at reasonable volumes.

Hence why I was considering the 4790k as my first ever Intel upgrade in 18 years. But that 8370e.... hmm drop-in replacement for my 1055t, not having to sneak in a motherboard upgrade past the wife...

 

[8350rocks]

Considering the 9590 now costs less than a 4670k...it is actually a really decent option now...

No it does not, even with a Newegg promo, it costs more. And this is the one without a bundled cooler even.

PCPartPicker part list / Price breakdown by merchant

CPU: AMD FX-9590 4.7GHz 8-Core Processor ($259.99 @ Newegg)
Total: $259.99
Prices include shipping, taxes, and discounts when available
Generated by PCPartPicker 2014-08-22 10:56 EDT-0400

PCPartPicker part list / Price breakdown by merchant

CPU: Intel Core i5-4670K 3.4GHz Quad-Core Processor ($227.99 @ NCIX US)
Total: $227.99
Prices include shipping, taxes, and discounts when available
Generated by PCPartPicker 2014-08-22 10:56 EDT-0400




I would still go with a 1231v3, and an H97 board, over either of them, personally. The 9590 would make for a nice space heater in the winter though. I am as disappointed in AMD right now as I was in Intel during the crapburst days.

PCPartPicker part list / Price breakdown by merchant

CPU: Intel Xeon E3-1231 V3 3.4GHz Quad-Core Processor ($247.98 @ SuperBiiz)
Total: $247.98
Prices include shipping, taxes, and discounts when available
Generated by PCPartPicker 2014-08-22 10:56 EDT-0400

Actually it does, price cuts coming september 1st. FX9590 to be $199

 

[logainofhades]

Still would rather buy a 1231v3 with an H97 board. Would be cheaper and perform better. No need for aftermarket cooler or more expensive motherboard to handle the 220w TDP. Once you get past FX 8320, the value drops quickly.

 

[jdwii]

Still would rather buy a 1231v3 with an H97 board. Would be cheaper and perform better. No need for aftermarket cooler or more expensive motherboard to handle the 220w TDP. Once you get past FX 8320, the value drops quickly.

Rereading some reviews on the FX 9590 and it seems like it NEEDS a water cooler which adds a good 80-110$ to the cost i wouldn't trust it without a H100i which retails for 100$.
The price drop will retail the 9590 to 215$(probably 230$ on newegg) which overall makes this an I7 investment meaning you better get I7 4770K performance however reading reviews that is not what you get but you get close. Then you have to spend more on a board to just handle the thing where the I7 can work fine on a 55$ board. I call the 9590-9370 pointless.
However for 169$ a 8350fx will be well worth it even more so for the 8320fx for just 140$ Basically the FX 8 core is priced at the Mid-range I3's. You would have to be crazy to claim the I3 is a better choice for gaming in today's world and its easily better for video encoding-rendering-recording gameplay. Also for 100$ the fx 6 core is amazing nothing from Intel at that price is worth it. However as you can tell Intel is pushing Amd lower and lower now they are competing with I3's instead of I5's and before they where competing with I5's instead of I7's.

 

[8350rocks]

Actually, building a 9590 system over the weekend with the Seidon120 that comes with it...will see what it does with the paired water cooler...

 

[jdwii]

Actually, building a 9590 system over the weekend with the Seidon120 that comes with it...will see what it does with the paired water cooler...

I can however say even if i don't think they are worth it from a performance/price standpoint they are fun to play around with which is probably Amd's market with these please come back and tell us how it went

 

[juanrga]

The Wiki article on Skylake says that it will double the number of integer registers from 16 to 32. This implies a fundamental change to the x86 ISA. Further discussion on another forum and one user claims that Intel will be cleaninup the x86 ISA and that AMD/VIA will be developing their own improvements to the x86 ISA: "Enhanced_86" vs. "Enhanced_64".

A cleanup of the x86 ISA to compete against ARM64 superior ISA is welcomed, but two or three incompatible ISAs would be more weird than Itanium vs AMD64 was.

I gave this user a credibility of 10% or so in base to his posting history, and the Wikipedia lacks source, but I mention it here because it is something very important in case he is rigth in this ocassion.

 

[blackkstar]

The Wiki article on Skylake says that it will double the number of integer registers from 16 to 32. This implies a fundamental change to the x86 ISA. Further discussion on another forum and one user claims that Intel will be cleaninup the x86 ISA and that AMD/VIA will be developing their own improvements to the x86 ISA: "Enhanced_86" vs. "Enhanced_64".

A cleanup of the x86 ISA to compete against ARM64 superior ISA is welcomed, but two or three incompatible ISAs would be more weird than Itanium vs AMD64 was.

I gave this user a credibility of 10% or so in base to his posting history, and the Wikipedia lacks source, but I mention it here because it is something very important in case he is rigth in this ocassion.

I wish you would have posted source: https://en.wikipedia.org/wiki/SkyLake_%28microarchitecture%29

They are just increasing the number of amd64 general purpose integer registers. Hardly a fundamental ISA change. A fundamental ISA change is more like the jump from 16 bit to 32 bit or 32 bit to 64 bit.

Here you had me thinking they were going to make massive changes. The registers are going to be mostly useless. Existing code won't use it and compilers will only put stuff in those registers if it's told to. And it'll break on everything that doesn't have those extended registers.

I initially thought it was some sort of windowing like SPARC uses to keep cores fed faster with SMT but it's not even that large of a change.

I don't understand how you extrapolate "a cleanup of the x86 ISA" from "a doubling of general use amd64 integer registers".

 

[de5_Roy]

The Radeon R9 285 will arrive Sep. 2 at $249
http://techreport.com/news/26963/the-radeon-r9-285-will-arrive-sep-2-at-249
gcn 1.1 uarch, 8 a.c.e. like tahiti, primary competition gtx 760.

All AMD Graphics CoreNext GPUs to Support DirectX 12: Company
http://www.techpowerup.com/204463/all-amd-graphics-corenext-gpus-to-support-directx-12-company.html

AMD FX-8370 and FX-8370E to Launch on September 2, 2014
http://www.techpowerup.com/204466/amd-fx-8370-and-fx-8370e-to-launch-on-september-2-2014.html

Radeon R9 285 3DMark FireStrike Performance Revealed
http://www.techpowerup.com/204467/radeon-r9-285-3dmark-firestrike-performance-revealed.html

 

[jdwii]

The Radeon R9 285 will arrive Sep. 2 at $249
http://techreport.com/news/26963/the-radeon-r9-285-will-arrive-sep-2-at-249
gcn 1.1 uarch, 8 a.c.e. like tahiti, primary competition gtx 760.

All AMD Graphics CoreNext GPUs to Support DirectX 12: Company
http://www.techpowerup.com/204463/all-amd-graphics-corenext-gpus-to-support-directx-12-company.html

AMD FX-8370 and FX-8370E to Launch on September 2, 2014
http://www.techpowerup.com/204466/amd-fx-8370-and-fx-8370e-to-launch-on-september-2-2014.html

Radeon R9 285 3DMark FireStrike Performance Revealed
http://www.techpowerup.com/204467/radeon-r9-285-3dmark-firestrike-performance-revealed.html

Was a little mad when the 6900 series didn't get support but Nvidia will support their old cards.

 

[jdwii]

I can tell Amd still cares about their high-end FX series
http://wccftech.com/amd-announces-x86-piledriver-fx-8370-fx-8370e-fx-8320e-processors/

"AMD even showed a live event where Chew from Xtremesystems clocked the chip past 8 GHz."

I remember Chew on the fourms he is easily Amd's head overclocker i thought he was done though?

 

[szatkus]

The Wiki article on Skylake says that it will double the number of integer registers from 16 to 32. This implies a fundamental change to the x86 ISA. Further discussion on another forum and one user claims that Intel will be cleaninup the x86 ISA and that AMD/VIA will be developing their own improvements to the x86 ISA: "Enhanced_86" vs. "Enhanced_64".

A cleanup of the x86 ISA to compete against ARM64 superior ISA is welcomed, but two or three incompatible ISAs would be more weird than Itanium vs AMD64 was.

I gave this user a credibility of 10% or so in base to his posting history, and the Wikipedia lacks source, but I mention it here because it is something very important in case he is rigth in this ocassion.

I wish you would have posted source: https://en.wikipedia.org/wiki/SkyLake_%28microarchitecture%29

They are just increasing the number of amd64 general purpose integer registers. Hardly a fundamental ISA change. A fundamental ISA change is more like the jump from 16 bit to 32 bit or 32 bit to 64 bit.

Here you had me thinking they were going to make massive changes. The registers are going to be mostly useless. Existing code won't use it and compilers will only put stuff in those registers if it's told to. And it'll break on everything that doesn't have those extended registers.

I initially thought it was some sort of windowing like SPARC uses to keep cores fed faster with SMT but it's not even that large of a change.

I don't understand how you extrapolate "a cleanup of the x86 ISA" from "a doubling of general use amd64 integer registers".

Like always he claims something based on informations he doesn't understand.

Also part of these claims he took from a lunatic:
https://semiaccurate.com/forums/showpost.php?s=021b6c23b6fc5eef051f1787f90f7121&p=219856&postcount=78 (warning: complete BS)

 

[blackkstar]

The Wiki article on Skylake says that it will double the number of integer registers from 16 to 32. This implies a fundamental change to the x86 ISA. Further discussion on another forum and one user claims that Intel will be cleaninup the x86 ISA and that AMD/VIA will be developing their own improvements to the x86 ISA: "Enhanced_86" vs. "Enhanced_64".

A cleanup of the x86 ISA to compete against ARM64 superior ISA is welcomed, but two or three incompatible ISAs would be more weird than Itanium vs AMD64 was.

I gave this user a credibility of 10% or so in base to his posting history, and the Wikipedia lacks source, but I mention it here because it is something very important in case he is rigth in this ocassion.

I wish you would have posted source: https://en.wikipedia.org/wiki/SkyLake_%28microarchitecture%29

They are just increasing the number of amd64 general purpose integer registers. Hardly a fundamental ISA change. A fundamental ISA change is more like the jump from 16 bit to 32 bit or 32 bit to 64 bit.

Here you had me thinking they were going to make massive changes. The registers are going to be mostly useless. Existing code won't use it and compilers will only put stuff in those registers if it's told to. And it'll break on everything that doesn't have those extended registers.

I initially thought it was some sort of windowing like SPARC uses to keep cores fed faster with SMT but it's not even that large of a change.

I don't understand how you extrapolate "a cleanup of the x86 ISA" from "a doubling of general use amd64 integer registers".

Like always he claims something based on informations he doesn't understand.

Also part of these claims he took from a lunatic:
https://semiaccurate.com/forums/showpost.php?s=021b6c23b6fc5eef051f1787f90f7121&p=219856&postcount=78 (warning: complete BS)

I'm more baffled by how he came to the conclusion that not removing anything and adding more registers is cleaning up the ISA. If he's talking about not having to use generic registers like EAX, EBX, etc and having them named a bit more sane then I guess that's cleaning it up if you really really stretch the term and ASM targeted at Skylake is all you program in. But EAX, EBX, etc are all 32-bit registers and the amd64 general purpose registers that already exist are all sanely named. So it's like saying, "here, we have registers r0-r15 for you to use, but we cleaned up the entire x86 ISA by adding r16-r31, it is getting closer to arm64 now!"

All those extra registers will end up being additional transistors on a chip that never get used by software by 99.999% of users. Some HPC users and a few people like me would take advantage of it but that's about it. It's just not enough to make a huge difference if you ask me. It's more like throwing transistors at the problem, trying desperately to increase IPC.

Expect some sort of specially compiled Skylake benchmark when reviews show up and the standard fare of circle jerking about how "wow Intel does it again in this massive out-lier result we have. When you average all 3 benchmarks we ran, Skylake was 50% faster so it's clearly 50% faster than AMD in every piece of software that exists in every OS you can run on your computer :^)"

 

[szatkus]

The Wiki article on Skylake says that it will double the number of integer registers from 16 to 32. This implies a fundamental change to the x86 ISA. Further discussion on another forum and one user claims that Intel will be cleaninup the x86 ISA and that AMD/VIA will be developing their own improvements to the x86 ISA: "Enhanced_86" vs. "Enhanced_64".

A cleanup of the x86 ISA to compete against ARM64 superior ISA is welcomed, but two or three incompatible ISAs would be more weird than Itanium vs AMD64 was.

I gave this user a credibility of 10% or so in base to his posting history, and the Wikipedia lacks source, but I mention it here because it is something very important in case he is rigth in this ocassion.

I wish you would have posted source: https://en.wikipedia.org/wiki/SkyLake_%28microarchitecture%29

They are just increasing the number of amd64 general purpose integer registers. Hardly a fundamental ISA change. A fundamental ISA change is more like the jump from 16 bit to 32 bit or 32 bit to 64 bit.

Here you had me thinking they were going to make massive changes. The registers are going to be mostly useless. Existing code won't use it and compilers will only put stuff in those registers if it's told to. And it'll break on everything that doesn't have those extended registers.

I initially thought it was some sort of windowing like SPARC uses to keep cores fed faster with SMT but it's not even that large of a change.

I don't understand how you extrapolate "a cleanup of the x86 ISA" from "a doubling of general use amd64 integer registers".

Like always he claims something based on informations he doesn't understand.

Also part of these claims he took from a lunatic:
https://semiaccurate.com/forums/showpost.php?s=021b6c23b6fc5eef051f1787f90f7121&p=219856&postcount=78 (warning: complete BS)

I'm more baffled by how he came to the conclusion that not removing anything and adding more registers is cleaning up the ISA. If he's talking about not having to use generic registers like EAX, EBX, etc and having them named a bit more sane then I guess that's cleaning it up if you really really stretch the term and ASM targeted at Skylake is all you program in. But EAX, EBX, etc are all 32-bit registers and the amd64 general purpose registers that already exist are all sanely named. So it's like saying, "here, we have registers r0-r15 for you to use, but we cleaned up the entire x86 ISA by adding r16-r31, it is getting closer to arm64 now!"

All those extra registers will end up being additional transistors on a chip that never get used by software by 99.999% of users. Some HPC users and a few people like me would take advantage of it but that's about it. It's just not enough to make a huge difference if you ask me. It's more like throwing transistors at the problem, trying desperately to increase IPC.

Expect some sort of specially compiled Skylake benchmark when reviews show up and the standard fare of circle jerking about how "wow Intel does it again in this massive out-lier result we have. When you average all 3 benchmarks we ran, Skylake was 50% faster so it's clearly 50% faster than AMD in every piece of software that exists in every OS you can run on your computer :^)"

It's even more bizzare. That information showed up on 2 July: http://en.wikipedia.org/w/index.php?title=Skylake_(microarchitecture)&diff=611182621&oldid=610263446

The same guy edited the article about X86: http://en.wikipedia.org/wiki/Special:Contributions/50.151.43.78
Which was removed later: http://en.wikipedia.org/wiki/User_talk:50.151.43.78

And Google can't find nothing about more registers for Skylake other than article from Wiki.

 

[szatkus]

Informations about cache also came out from nowhere (2 times bigger than now):
http://en.wikipedia.org/w/index.php?title=Skylake_(microarchitecture)&diff=580936777&oldid=578769707