AMD CPU speculation... and expert conjecture

[-Fran-]

[I already explained before that only the GDDR5 version of the HD7750 has cores @ 900MHz, the DDR3 version is 800MHz. Both are bulk, the lower clocks are due to memory bandwidth.

The lower iGPU clocks n Kaveri are consequence of the drop of GDDR5 support. I already mentioned that someone said me that Kaveri die has a disabled GDDR5 IMC. The decision to drop GDDR5 was taken very late.

Add to that that Kaveri has lower TDP and power consumption requirements than Trinity/Richland, because is more focused to mobile.

Kaveri on bulk achieves about the same base clocks than Trinity on SOI. Richland achieves higher clocks thanks to a more mature process. Kaveri is the first product made by Glofo in the new node.

About turbos, I have given above a link to an article that claims that AMD has not still decided the turbo frequencies.

Why does core frequency has a relation to the type of RAM used? Does the IMC share the core clocks?

Cheers!

 

[gamerk316]

[I already explained before that only the GDDR5 version of the HD7750 has cores @ 900MHz, the DDR3 version is 800MHz. Both are bulk, the lower clocks are due to memory bandwidth.

The lower iGPU clocks n Kaveri are consequence of the drop of GDDR5 support. I already mentioned that someone said me that Kaveri die has a disabled GDDR5 IMC. The decision to drop GDDR5 was taken very late.

Add to that that Kaveri has lower TDP and power consumption requirements than Trinity/Richland, because is more focused to mobile.

Kaveri on bulk achieves about the same base clocks than Trinity on SOI. Richland achieves higher clocks thanks to a more mature process. Kaveri is the first product made by Glofo in the new node.

About turbos, I have given above a link to an article that claims that AMD has not still decided the turbo frequencies.

Why does core frequency has a relation to the type of RAM used? Does the IMC share the core clocks?

Cheers!

He's arguing that core speed was reduced because DDR3 can't keep up, so it therefore was more cost effective to lower clocks, reducing power draw and increasing yields, then keeping the core speed high when the GPU was known to be bottlenecked by RAM.

 

[juanrga]

I've made my views clear on MANTLE. And Unified Addressing, while nice, still doesn't remove the physical bottleneck of having to transfer data over the bus to the GPU/APU, so there won't be a lot of performance gain there (just makes the code a lot easier to manage). Not shocked about no GDDR5; I predicted it due to cost, remember?

I don't know the details of Nvidia just announced unified addressing. We must wait to know more details, but AMD hUMA alleviates part of the bandwidth bottleneck, because can eliminate extra cycles of copy/paste memory blocks between CPU/APU and GPU.

The problem with GDDR5 doesn't seem to be cost, but that DIMMS are not ready.

imho, consoles seem like amd's backup plan, should they drop into red during transition to ARM.

Consoles are part of the semi-custom division, which is central to AMD plan of evolution away from PC

http://www.anandtech.com/show/7281/understanding-amd-semi-custom-strategy

 

[8350rocks]

AMD should have invested in having their own fabs when they had the chance...

AMD needs to be like, "We've got a 12 core excavator chip on 14nm process running @4.5 GHz coming to our FM3 Platform which will be supporting DDR4 CUZ YOLO!"

*edit* On another note, I've got a FX 8350 coming my way anytime next week! So excited! It looks like this chip won the silicon lottery too...

Nice, congrats!

 

[juanrga]

[I already explained before that only the GDDR5 version of the HD7750 has cores @ 900MHz, the DDR3 version is 800MHz. Both are bulk, the lower clocks are due to memory bandwidth.

The lower iGPU clocks n Kaveri are consequence of the drop of GDDR5 support. I already mentioned that someone said me that Kaveri die has a disabled GDDR5 IMC. The decision to drop GDDR5 was taken very late.

Add to that that Kaveri has lower TDP and power consumption requirements than Trinity/Richland, because is more focused to mobile.

Kaveri on bulk achieves about the same base clocks than Trinity on SOI. Richland achieves higher clocks thanks to a more mature process. Kaveri is the first product made by Glofo in the new node.

About turbos, I have given above a link to an article that claims that AMD has not still decided the turbo frequencies.

Why does core frequency has a relation to the type of RAM used? Does the IMC share the core clocks?

Cheers!

Look at the HD7750, 512 shaders as Kaveri, but only the GDDR5 version has 900MHz cores, the DDR3 version of the 7750 has 800MHz cores. The reduction from 900MHz to 800MHz is not due to SOI vs bulk, because both versions of the HD7750 are bulk, the drop is due to the memory bandwidth.

Kaveri is 720MHz and DDR3. I suppose that it would be around 900MHz if the GDDR5 support had not been dropped.

 

[8350rocks]

Spoiler

How about the 8% they missed the CPU target and the 24% they missed the GPU target?

They didn't hit the CPU target because of clockspeed, and they didn't hit the GPU target because of clockspeed.

Both of those factors correlate to several things:

Target TDP limits (influenced by bulk vs. FD-SOI)
Target power consumption limits (influenced by bulk vs. FD-SOI)
Clockspeed headroom (influenced by bulk vs. FD-SOI)

The issue is, bulk substrate means higher leakage, which means more power is required to reach the same clockspeed that can be achieved on FD-SOI because of the insulator.

This means, basically, that while Kaveri runs at 3.7 GHz at 95W TDP, Richland runs at 4.1 GHz + Turbo at 100W TDP or 10% faster on a less advanced process with larger/fewer transistors.

Now, your 20% performance gain just took a 10% hit because of loss of clockspeed. See the difference?

High leakage in bulk substrate is why Intel uses so many tricks to make FinFET work on bulk. Like 3D transistors, and all the other super expensive to R&D stuff they use in their fab just to keep clockspeeds competitive on bulk process.

Additionally, bulk is far more temperature sensitive to power consumption at lower voltages than FD-SOI. If you crank the vcore up on a haswell chip, it gets hot fast. You can turn up the vcore on a FX chip and it doesn't require nearly as drastic cooling to run cooler than the Intel option.

These are all factors that you have not addressed and lead directly into the issues AMD had with bulk process.

They are also why I believe my contact mentioned directly that they would not pursue HEDT on bulk substrate, and would not be doing bulk beyond 28nm.

In the end, if AMD keeps this up, we all lose. FinFET is not the way of the future, it's many times more costly to develop a FinFET on bulk with all the technology Intel has, to compete, rather than take a simple planar UTBB FD-SOI that competes without all the dog and pony show tricks to get there.

But what do I know about CPUs? You clearly are the master of everything about CPUs, if nothing else because you said so, and no one else could possibly be right about something.

FX > Kaveri

i)
They didn't miss 8% of CPU target, because AMD never revealed the frequencies. In my BSN* article I included a table with three different combinations of frequencies. Final Kaveri CPU freq. is only a 3% behind one of them.

The same about the GPU frequencies. AMD never gave them.

ii)
I already explained you that only the GDDR5 version of the HD7750 has 900MHz clocks. The version with DDR3 has 800MHz clocks. Kaveri has 720MHz. All them bulk.

The large drop in iGPU performance from original expectations is explained by AMD dropping the GDDR5 support. The original 1050GFLOP Kaveri was considering GDDR5 memory. BSN* has copies of the original docs reporting GDDR5 support. I already mentioned that someone has said me that the Kaveri die has a disabled GDDR5 IMC. Which means that the decision to abandon GDDR5 was taken very late.

iii)
Trinity and Richland are 100W. Kaveri is limited to 95W TDP. Limit both Trinity and Richland to 95W max and say me about how many you drop frequencies.

My bet is that a 95W rated Trinity would be ~3.7GHz and Richland ~3.9--4.0GHz

iv)
Kaveri has larger and powerful iGPU than Trinity/Richland. Those 100W TDP for the APU are distributed between CPU and GPU.

Take Trinity/Richland and substitute their iGPU with a Kaveri-level iGPU. If the total TDP continue being of 100W, you have to cut the CPU frequencies by some extension.

v)
Sure that Kaveri would achieve higher clocks in SOI. Has someone said the contrary here? NO But are you aware that Glofo has not ready 28nm SOI? AMD decision to go bulk has been a success. I don't understand why you guys don't accept it.

vi)
We don't know turbo frequencies nor its aggressivity. What if AMD follows Intel way of lower base clocks and higher turbo clocks?

The last rumor is that AMD is considering >4.0GHz turbo.

vii)
In my BSN* article I didn't considered a 20% IPC gain over PD, but a 20% minus a 5% for unknows. Palying safety, this means that my predictions of i5 level of performance are off by about a 3%.

Now, benchmarks leaked after I wrote my article say that SR is a 31% faster than PD and speculate about higher gains in the final silicon

It is still too soon. There are so many unknows.

viii)
It is evident than FinFET is the future. AMD is already tapping out chips on 14nm bulk FinFET and some foundries are running the first tests of 10nm FinFET.

But hey you are the expert that said us that Kaveri was SOI...

I. http://semiaccurate.com/2013/11/12/amd-misses-expectations-kaveri/

AMD did announce targets at the financial analysts day in the summer. 4.0 GHz and 900 MHz were the targets...how else did you arrive at your speculated numbers? You pulled them out of the sky? The GFLOPS number they gave was what you used...remember? Selective memory? Alzheimer's?

II. You're dismissing it because you don't want to admit they missed their targeted performance bracket on bulk. It would make your entire argument wrong.

III. That's right, a 95W Richland part would still have higher clocks on a less advanced process. See something wrong with that? Trinity level base clocks (i.e. 1.5 generations ago) are not acceptable.

IV. You're neglecting that Kaveri is also using GCN which is supposed to consume less power than VLIW4, which is what was on Trinity/Richland. Your argument holds no water.

V. Because it is a failure, and behind the scenes, AMD is basically almost admitting as much without outright saying it missed the performance targets because of process constraints. I want AMD to succeed as much, or more, than you do; however, we should be calling a spade what it is, a spade. Kaveri is a great APU, which tends to be a upper low end part in the flagship SKU. Berlin server APUs/CPUs are aimed at lower power/lower compute demand servers. People who need to crunch data go for 16 core Opterons. That's specifically because they're still better at that than APUs.

VI. That would suit AMD's TC 3.0 setup on Richland, 300 MHz turbo would put TC @ 4.0 GHz, now the issue arises, how often will turbo engage? Most of the time like Intel, or only a small portion of the time like the last gen AMD processors? Even then, it still doesn't mitigate the fact that the 6800k has a turbo of 4.4 GHz.

VII. 3% on the CPU only calculations. They are off as much as 19% in the CPU + GPU possibility calculations. Additionally, you assumed a 4.0 GHz clock, you've now not only lost an extra 3% clock speed, however, you're also 5% shy of what the improvement actually looks to be so far. Which puts your estimates closer to 8% off. Not trying to be a downer, but reality is where we live, and that has to be accounted for.

VIII. No, AMD is beginning to develop for 14nm XM, which is not a FinFET. It could be, though you'd have to design a FinFET to go on 14nm XM substrate (14nm FE with 20nm BEOL). 14nm XM could also be FD-SOI...as STMicro already has some designs for booster tech on that technology as well. Consider that 14nm XM was co-developed with STMicro, they are prepared for whatever it needs to be.

I am not sure why GF has such issues with 28nm booster tech for FD-SOI, personally I think it has everything to do with the delays on 28nm bulk, because you cannot implement BEOL booster tech for FD-SOI if you don't have bulk going yet.

Either way, AMD is being hamstrung by GF over the process technologies they have access to...which is why Kaveri is being made at TSMC, not GF. I expect if they get future FD-SOI tech up and running at acceptable levels, we might see FX successor @ GF. Though currently, that doesn't look likely to happen until GF sort out their issues.

FYI: the only foundry currently using a FinFET is Intel's foundry, and their FinFET is on bulk substrate. That's also why they have had yield issues with the last few CPUs and high overclock variance. Because a FinFET is very complex, and doing it on bulk requires additional mask layers to prevent leakage, making even more issues. Though, I hope Intel doesn't see the light...because FinFET is arguably dead before it got off the ground. Maybe when they chase something past 7nm it will take off...(if FinFET can indeed get to 5nm as some have speculated).

 

[de5_Roy]

^^ kaveri is being made by tsmc?

 

[8350rocks]

^^ kaveri is being made by tsmc?

Yes, AMD didn't even use GF to make Kaveri, because GF has such issues with 28nm.

THAT is why Kaveri is on 28nm bulk...because TSMC doesn't use FD-SOI.

http://www.extremetech.com/computing/145655-amd-quietly-confirms-28nm-kabini-temash-chips-are-being-built-at-tsmc

They are using the same production lines that make Kabini and Temash for Kaveri, and Mullins and Beema.

Currently the only business done @ GF is FX and Richland and the Opteron parts on PD. That is why they are not ordering enough silicon from GF. If GF doesn't get their act together we may not even see FX successor for SR on 28nm, it may not come until 20nm at this point.

 

[de5_Roy]

^^ from the begining i've had the impression glofo was making kaveri. when did it change and what is the source?
the latest fudzilla article i read hints at possible financial problems if amd tries to lower number of wafers bought from glofo. that's why i don't understand why they switched to tsmc. and none of the source indicated tsmc making kaveri.

 

[8350rocks]

^^ from the begining i've had the impression glofo was making kaveri. when did it change and what is the source?
the latest fudzilla article i read hints at possible financial problems if amd tries to lower number of wafers bought from glofo. that's why i don't understand why they switched to tsmc. and none of the source indicated tsmc making kaveri.

My source touched on it, and your article from fudzilla dances around it quite a bit...that's an internal and external confirmation within 5 days of each other...

http://www.fudzilla.com/home/item/33169-amd%E2%80%99s-glofo-deal-could-lead-to-inventory-issues

So what about Kaveri, Beema and Mullins? It is still unclear, the rumour mill points to TSMC being tapped for Kaveri (bulk, not SOI), but we are still not sure about Puma-based low-end APUs. Basically there is a very good chance that all AMD 28nm parts next year will be produced by TSMC

EDIT: To clarify, my source commented that they still had not determined that GF would indeed end up being the producer of Kaveri, there was no outright confirmation. Though he hinted that there was a great deal of frustration aimed at GF right now, and that Kaveri being produced there was "still up in the air".

 

[Cazalan]

ii)
I already explained you that only the GDDR5 version of the HD7750 has 900MHz clocks. The version with DDR3 has 800MHz clocks. Kaveri has 720MHz. All them bulk.

The large drop in iGPU performance from original expectations is explained by AMD dropping the GDDR5 support. The original 1050GFLOP Kaveri was considering GDDR5 memory. BSN* has copies of the original docs reporting GDDR5 support. I already mentioned that someone has said me that the Kaveri die has a disabled GDDR5 IMC. Which means that the decision to abandon GDDR5 was taken very late.

GFLOP ratings are merely peaks which assume the code is entirely operating from the L1/L2 caches with no branch prediction failures or other pipeline stalls. The memory speed doesn't matter.

Whether or not the workload is memory bound is entirely dependent on the workload.

HD7750 is made on TSMC bulk gate-last process.
Kaveri is made on GF bulk gate-first process.

They're not the same process. The performance will be closer than say bulk vs PD-SOI but still not the same.

The clock reductions are entirely to do with the target TDP and the GF 28nm process.

 

[de5_Roy]

My source touched on it, and your article from fudzilla dances around it quite a bit...that's an internal and external confirmation within 5 days of each other...
http://www.fudzilla.com/home/item/33169-amd%E2%80%99s-glofo-deal-could-lead-to-inventory-issues
EDIT: To clarify, my source commented that they still had not determined that GF would indeed end up being the producer of Kaveri, there was no outright confirmation. Though he hinted that there was a great deal of frustration aimed at GF right now, and that Kaveri being produced there was "still up in the air".

kaveri never seemed like it's design could be ported to tsmc so fast, if amd is still undecided about volume production. afaik, this shoulda been solved a year ago, and we'd have a confirmed foundry partner for kaveri by now. iirc i never even heard of a kaveri tape-out at tsmc.
fudzilla's beating around the bush just worsened my confusion.
tsmc may be familiar with gcn, but not with the apu's cpu cores, unb, the buses etc. all these rumors only hint at a cluster!@#$.

 

[8350rocks]

My source touched on it, and your article from fudzilla dances around it quite a bit...that's an internal and external confirmation within 5 days of each other...
http://www.fudzilla.com/home/item/33169-amd%E2%80%99s-glofo-deal-could-lead-to-inventory-issues
EDIT: To clarify, my source commented that they still had not determined that GF would indeed end up being the producer of Kaveri, there was no outright confirmation. Though he hinted that there was a great deal of frustration aimed at GF right now, and that Kaveri being produced there was "still up in the air".

kaveri never seemed like it's design could be ported to tsmc so fast, if amd is still undecided about volume production. afaik, this shoulda been solved a year ago, and we'd have a confirmed foundry partner for kaveri by now. iirc i never even heard of a kaveri tape-out at tsmc.
fudzilla's beating around the bush just worsened my confusion.
tsmc may be familiar with gcn, but not with the apu's cpu cores, unb, the buses etc. all these rumors only hint at a cluster!@#$.

I think this is precisely why they delayed it so long...

I am also pretty confident that they were likely working with both foundries on 28nm, especially considering AMD knows what kinds of yields to expect at TSMC.

It's all a giant pain in the ass...honestly, I have thought far more heavily about whether or not it was honestly a good idea for AMD to spin off GF. I know from a purely business perspective they needed to do it...however, I think the fruit of that decision is just now being born.

Intel doesn't have these issues because their fab is under control. AMD has these issues because they have to play musical fabs with every #*$&ing product they want to produce.

 

[Cazalan]

edit: Sony’s PlayStation 4 Costs $381 to Build — Only $18 Under Retail Price — in Teardown
http://allthingsd.com/20131119/teardown-shows-sonys-pla...

Which means AMD is making next to nothing per part sold; they're basically selling to Sony just above cost. So a significant portion of AMD's limited capacity is being used to make a chip they aren't going to make any money off of, like I suspected months ago.

While teardowns are cool they aren't 100% accurate. It's impossible for them to know the exact price breaks for multi-year multi-million part sourcing contracts. Anyway breaking even isn't bad considering some of the past consoles. They not only have game and controller royalties they also have the subscriptions to make more money.

AMD knew the margins would be low but they said in the mid teens. Sony/MS paid for the R&D up front so it is basically pure profit for AMD. The support contracts partially subsidize driver/API development so they get reuse there as well.

It's a win for AMD no matter how you slice it. Just how big a win depends on the console sales and if they can leverage that into more embedded APU sales. Not to mention the free marketing.

 

[-Fran-]

He's arguing that core speed was reduced because DDR3 can't keep up, so it therefore was more cost effective to lower clocks, reducing power draw and increasing yields, then keeping the core speed high when the GPU was known to be bottlenecked by RAM.

Ah, it makes sense then to go with lower clocks for the iGPU, but why the CPU as well?

I mean, ok, you can have a lower thermal ceiling by just lowering the iGPU speed in normal operation, but why lower the CPU speed as well when it isn't really memory dependent.

And that leads me to think that when both are taxed, we'll see a BIG drop in performance due to the thermal ceiling as well, jeez. Hope I'm wrong on that one.

Look at the HD7750, 512 shaders as Kaveri, but only the GDDR5 version has 900MHz cores, the DDR3 version of the 7750 has 800MHz cores. The reduction from 900MHz to 800MHz is not due to SOI vs bulk, because both versions of the HD7750 are bulk, the drop is due to the memory bandwidth.

Kaveri is 720MHz and DDR3. I suppose that it would be around 900MHz if the GDDR5 support had not been dropped.

Yes, for the dGPUs it makes sense, because you can save on thermals and sell cheaper, making the whole thing cheaper, but for APUs, specially when you have to cap the CPU, it doesn't make sense to lower the frequency because you won't be able to use "fast RAM". That's the point I wanted to clear up and the point I am particularly worried about, to be honest.

Like I said a little above, why cap the CPU speed when the only component losing the edge would be the iGPU because of DDR3?

The lack of GDDR5 doesn't explain (to me) the lower CPU speed, but going Bulk does. It might not be the "full answer", but I'm pretty sure we're not off the mark on that one.

When we see the first Kaveris being rolled out, we'll see through their OC capabilities if the Bulk process had like 99% of the blame for the lower clock speeds.

Cheers!

 

[Cazalan]

My issue isn't that AMD is making a nice steady revenue stream selling APU's to consoles, its that if they focus on the PC instead, they could make a heck of a lot more.

In this case they stole business from IBM who was making the prior gen console CPUs. While they were already providing GPUs to that market they got to capture a bigger piece of it. PC would be nice to recapture share but its not a growth market anymore.

I'd say they are focusing on PCs as well but not so much the enthusiast PCs which most people who frequent here are excited about. Competing with Intel in every market segment with 1/20th the R&D just isn't possible.

 

[Cazalan]

I expect more iGPU updates. That's about it though.

the rather scary part about cherry trail is that with 16 "gen 8" eus and 4 cores, this is a 4 core soc with ivb-class igpu. it can potentially rout amd, nvidia's low end gpu lineup including low-binned apus from both mobile and desktop, and shrink the low end gfx market to only to cater to legacy machines. yeah, amd apus offer discreet class performance at entry level price and stuff, but intel has higher marketshare and far longer reach.

If the 4->16 EU is true that definitely is a problem for the Kabini/Temash successors. Intel is going all in on the iGPU front.

 

[Cazalan]

It's all a giant pain in the ass...honestly, I have thought far more heavily about whether or not it was honestly a good idea for AMD to spin off GF. I know from a purely business perspective they needed to do it...however, I think the fruit of that decision is just now being born.

Agreed with the pain in the ass part but the alternative was going bankrupt. GF poured like 8 Billion to lift production capabilities in NY and that still isn't enough.

 

[Cazalan]

Kaveri is made at tsmc on 28nm bulk gate first production

and GF still is producing lliano apu's but amd only pays for good 32nm chips

I don't see how that's possible with their WSA. The "only good die" contract ended a while ago for llano as they shifted to Trinity production. If all APU went from GF to TSMC they would be paying even bigger fines next year. Any fine at this point would put them back in the red.

 

[blackkstar]

It's all a giant pain in the ass...honestly, I have thought far more heavily about whether or not it was honestly a good idea for AMD to spin off GF. I know from a purely business perspective they needed to do it...however, I think the fruit of that decision is just now being born.

Agreed with the pain in the ass part but the alternative was going bankrupt. GF poured like 8 Billion to lift production capabilities in NY and that still isn't enough.

Yeah but look where AMD is now with GloFo.

They can't even make a high end part because they have no SOI. Their previous mid-range parts which were SOI are now bulk. Those parts are clocking lower.

If 28nm was still SOI it would still be tolerable. Bad, but tolerable (remember Intel exaggerates the size of their nodes by measuring with non-industry standards, so 22nm is more like 26 to 28nm).

SOI was always AMD's one major process advantage. I still have an Opteron 165 that takes 1.7v+ no problem. I also have Pentium 4 Netbursts that are dead in my basement because I brought 90nm P4 Prescott to 1.55v and tried to boot into windows desktop 3 times to get a CPU validation at 4ghz.

I don't even want to fathom what SR FX on bulk would look like. I would probably kill it in a few days after playing with my FX 8350 so much.

But my question on all of this is simple. Why is Kaveri 28nm when they'd be better off 32nm SOI?

Is it because of WSA? But GloFo didn't deliver any SOI, so they didn't really hold up their side either, right?

At this point I'm personally more concerned with what happened to SOI at 28nm, 22nm SOI, and what the deal is with AMD's options on where to build chips.

As for gamerk doubting HSA so much, yeah it's comparable to other technologies like PhysX but this is significantly larger. AMD even purchased an entire other company to make this happen. And AMD is in a unique position where they can still offer x86 parts that are HSA accelerated, which is what general consumers want (for the most part outside of cheap ARM parts to play angry birds on).

I want answers to what happened with GloFo and 22nm SOI before I admit defeat that AMD planned on going APU only this entire time.

 

[8350rocks]

This is what I think:

I think GF primarily did SOI to keep AMDs majority production there. They had some issues with 28nm, and couldn't deliver on time. Therefore, AMD said "screw it" and went to TSMC, who already had a decent but mature 28nm bulk process in place.

When that happened, GF likely stopped trying on 28nm FD-SOI. However, AMD is probably looking at 20nm and wanting to do FD-SOI, which gives GF about 12-18 months to get that up and working for early production runs. If GF can get 20nm FD-SOI up and running using STMicro booster tech, then we will probably see them re-enter the HEDT market with 20nm FD-SOI.

If GF screws the pooch and can't get it's timetables back in line, then AMD may look elsewhere for 20/22nm production lines, and only God knows who will have satisfactory production capability at that node by then. If GF keeps screwing this up, we may see AMD move to a FinFET on bulk as a desperation attempt to keep going. Though this whole process debacle is certainly killing them. Kaveri could have been a massive, resounding success on FD-SOI.

 

[8350rocks]

It's all a giant pain in the ass...honestly, I have thought far more heavily about whether or not it was honestly a good idea for AMD to spin off GF. I know from a purely business perspective they needed to do it...however, I think the fruit of that decision is just now being born.

Agreed with the pain in the ass part but the alternative was going bankrupt. GF poured like 8 Billion to lift production capabilities in NY and that still isn't enough.

Honestly, a well executed chapter 11 restructuring might have been better. Perhaps the fabs could have been streamlined and made to work at an acceptable level of cost. As opposed to out sourcing all production to seemingly incompetent companies that cannot get QA under control.

 

[8350rocks]

http://www.pcper.com/reviews/Editorial/Next-Gen-Graphics-and-Process-Migration-20-nm-and-Beyond/20-nm-and-Below

That article from pcper.com assumes that GF is producing the 28nm APUs, but the commentary about 20nm and smaller is very good. It appears that TSMC will have 20nm Gate Last up and running for Q3 2014, and GF could be aiming squarely at 20nm FD-SOI using STMicro booster tech. The issue would be making it work at that node, since STMicro only has designs for 28nm and 14nm XM FD-SOI. If they were able to develop a planar UTBB FD-SOI production line, then it would really be as though the clouds parted and sunlight shone through on Sunnyvale.

We can only watch it unfold for now...though FD-SOI @ 20nm does seem to solve all the problems Intel had @ 22nm and gives similar power consumption in ULV formats with much better power curves for HEDT.

EDIT: http://www.pcper.com/reviews/Editorial/Next-Gen-Graphics-and-Process-Migration-20-nm-and-Beyond/What-Point-Editorial

The following page discusses Intel looking at FD-SOI for their parts past 14nm lithography.

 

[Cazalan]

Yeah but look where AMD is now with GloFo.

They can't even make a high end part because they have no SOI. Their previous mid-range parts which were SOI are now bulk. Those parts are clocking lower.

At the time they were already like 6 Billion in debt. They couldn't keep floating the fab by themselves. They would have been stuck at 45nm today at best.

SR could have been made at 32nm SOI if they wanted. Someone (probably long gone by now) decided not to. Deciding 18mo in advance where a process node will be can't be easy. Intel has the luxury of taping out several versions of parts where AMD has to be more selective. When AMD sold the remaining shares in GF they likely lost any influence they had in choosing which nodes get R&D priority.

IBM is doing 22nm SOI but there still isn't a release date. Mid 2014 is the estimate. Sounds like 28nm SOI was skipped and waiting another 6-8 months wasn't attractive either.

 

[palladin9479]

Console makers often sell the consoles at a loss. They make up for this in games and accessory sales. I don't see how what Sony is doing makes any difference on how much AMD is making per chip.

Because this go around, Sony is allegedly making a profit per console sold. And if the BOM is only ~$20 cheaper then the retail price, then it follows that each component is being brought at basically break-even value. AMD probably makes the most profit per part, but I can't imagine its in excess of $10 or so.

In other words: Great for market share, not so much for profit. Especially if this locks out production of consumer chips with higher margins.

Except no.

That was just the component market cost, not what Sony was paying for it. Nor does it include what Sony is paying AMD for their chip. Console makers sell their products at under cost and make up the difference plus profit in software licensing fee's.

Finally since Sony is a bulk purchaser they would have a long term agreement with AMD to purchase a specific number of units. That is always preferred over retail sales. This is very similar to the agreements AMD would have with Tier 1 OEM's.