AMD CPUs, SoC Rumors and Speculations Temp. thread 2

[jimmysmitty]

But here's the concern: If Intel undercuts AMD with a lower-power lower-cost i3 chip, they will continue to hold that market tight. Likewise, if there's no performance advantage to 8/16 from, say, 4/8 or even 2/4, how is AMD expecting to sell their highest-margin products?

See the problem? AMD is making a performance CPU at the same time new APIs (that AMD ironically helped spur the development of) are lessening the CPU impact in gaming. With Mantle, AMD may have accidentally ensured Zen's commercial failure.

The benchmark in its current state is mostly the environment. There is no gameplay/AI/units yet so it is not indicative of final performance. As others said it is a "grass simulator" at this point.

But the environment can be one of the most stressful parts on a GPU and CPU. Look up GTA V. People with lower end systems, or even decent systems, have to lower just one options normally to get much better performance, the grass quality level.

Now true, this wont be indicative of real game performance but I wouldn't be surprised if a real game is similar to this. The only other "benchmark" is a game benchmark that was co-developed by AMD so it could easily have benefits for the GCN uArch and none for Maxwell.

We will only truly see in the near future as DX12 games start to trickle out. Maybe ARK will soon get a DX12 patch we can test with.

As for Jim, I think he left for a mix of all the reasons stated. AMD is in a very uncertain way right now and their survival depends on Zen being successful, their GPU division is just not able to keep the boat a-float anymore.

I hope it is but I just don't feel it. Maybe it is due to the way it is being presented feels a lot like K10/BD. I hope I am wrong.

 

[juanrga]

I don't think it is "less relevant" IF Keller left AMD without finishing K12 and IF Zen is not finally his baby.

 

[juanrga]

Some guys in the whole internet, also here, have suggested that Keller left AMD because the work on Zen is done. They draw parallelism with K8. They claim that Keller left AMD after doing K8 work and much before AMD did launch K8.

AMD has also tried to sell that myth. Drew Prairie, director of corporate communications at AMD, said:

Architecture decisions are many years in advance of products. As you may remember, he was a primary architect on K8. We launched that product in 2003 and he had left AMD in 1999.

http://www.kitguru.net/components/cpu/anton-shilov/legendary-microprocessor-developer-jim-keller-leaves-amd/

Well, this is what Kanter said me, when discussing Keller's departure:

Keller was never the guy behind the K8. He was the chief architect early on, but left AMD well before the project converged on a design. Dirk Meyer, Fred Weber, Kevin McGrath, and a couple of others ended up picking the pieces. I think the original idea was for something that was fairly different from the K7...but due to time-to-market and the disappearance of the original chief architect, they scaled back their ambitions.

We got a K7-like architecture with 64-bit, on-die memory controller, and Hypertransport (obviously, there were other changes, but those were the big ones).

Thus I extend my hypothesis (no theory) to account for this info. My hypothesis is that Keller left AMD due to discrepancies with Lisa Su due to cancellation/delays of projects for which he was hired by Rory Read. And that the Zen that will be released by AMD is different than the Zen that Keller initially developed.

It could be a quasi-repetition of the K8 issue again! Keller is hired to do something. There are discrepancies, then he left AMD and engineers that remain at AMD finish a different design is less ambitious than the one originally made by Keller.

This hypothesis could explain why Keller left before the design of Zen is finished. It is not his baby! It could explain why AMD only "expects" Keller's departure will not affect products/roadmaps. It could explain the rough departure and the lack of replacement. It coiuld explain why AMD gives the press a photo of the Zen team without Keller. It could explain why Suzzane didn't mention him a single time. It could also explain the discrepancies between the performance claimed by Papermaster at FAD 2015 for Zen and the performance claimed by Keller himself for his Zen [1].

It is a hypothesis, but the irony here is that all people has been saying that Keller leaving AMD again was a copy of what happened when Keller left AMD in 1999, could be correct, but just by the contrary reasons that they thought!

[1] Sure some of you recall the 100% higher IPC figure that I posted in the old thread. That figure was coming from Keller himself!

I am going to squash this pretty quickly here.

Having had the opportunity to discuss this in depth with someone I trust...Keller never worked on any of the excavator designs, those changes were delegated to a team handling APUs and he rubber stamped them. In fact, when he came in, it was his call to outright scrap everything past PD on HEDT and just do APUs because he wanted to focus the R&D budget on Zen/K12 for HEDT/Server. The executives agreed, as the best margins are in servers anyway, and even a 5% uptick in server sales would bring windfall revenue to AMD.

The actual designs behind Zen/K12 and, more specifically the cores and "uncore", were all well designed out, thoroughly tested in simulations, and settled on as the final course of action. Keller left because he felt confident that the engineers left behind could refine the initial design, and his passion is the creation of new architectures...not refining his own existing designs.

As much as AMD would love to have him do another uarch (and they may when that time once again comes...), at this point they cannot guarantee him that opportunity in the near future.

AMD is pushing CPUs first because a series of reasons:

(i) CPU is simpler and cheaper to made than APU.

(ii) HSA and specially accelerated server software is not ready. That is why AMD announced the Berlin APU for server and we did never hear about it again. Most current server software only could use the CPU part of the server APU.

(iii) The GPU architecture (Koduri's baby) and specially the HBM stuff is not ready. AMD cannot do a 4TFLOPS APU for servers and rely on DDR4 memory because that would seriously bottleneck the performance.

--

At FAD 2015 AMD announced datacenter roadmaps with their "High-Performance Server APU" coming a year after the server CPU. That server APU was defined as "Multi-Teraflops for HPC and Workstation" and includes "HSA Performance Delivered" and "Transformational Memory Architecture". By the last item I guess they mean an hUMA-enabled HBM pool.

Keller didn't left "because he felt confident". We know he left AMD abruptly and without naming a successor (the CTO has to take his duties temporarily until AMD finds a successor for him) and we know that AMD didn't guarantee anything:

Jim Keller’s departure is not expected to impact our public product or technology roadmaps

"is not expected" is not the same than saying that Keller left AMD because everything is under control. I know AMD didn't even tapeout Zen, everything what they have are simulations. The performance figures given by Papermaster at FAD 2015 were based in simulations, not silicon.

 

[vmN]

@Juanrga
How do we know he left adruptly?
If by, he is not featuring in that news article (on a non-tech site), that is kinda lacking as evidence.
By having an argument with Su? Do we have any evidence on that?

The more you know, the more you know you don't know. Live with it. We can keep guessing out all possible ways this went in our little crazy multiverse, pulling out every supportive argument for every instance. But you can see how crazy this have gone, by how little actual information we have, and the conclussion we are drawn too.

 

[Saga Lout]

@Juanrga
How do we know he left adruptly?

It's pretty standard practice in big business to show someone the door as soon as he/she signifies an intention to leave. The stiffer the competition, the faster that door will be opened. You don't want someone in the house if they've said they want out. It's far cheaper to pay them out their contractual notice period than to fund the cost of any damage they might do.

 

[vmN]

@Juanrga
How do we know he left adruptly?

It's pretty standard practice in big business to show someone the door as soon as he/she signifies an intention to leave. The stiffer the competition, the faster that door will be opened. You don't want someone in the house if they've said they want out. It's far cheaper to pay them out their contractual notice period than to fund the cost of any damage they might do.

That is very standard for a lot of positions in a lot of professions, but that does not answer my question.
I simply can't see the connection some here have put together, by the information available publicly.

 

[gamerk316]

But here's the concern: If Intel undercuts AMD with a lower-power lower-cost i3 chip, they will continue to hold that market tight. Likewise, if there's no performance advantage to 8/16 from, say, 4/8 or even 2/4, how is AMD expecting to sell their highest-margin products?

See the problem? AMD is making a performance CPU at the same time new APIs (that AMD ironically helped spur the development of) are lessening the CPU impact in gaming. With Mantle, AMD may have accidentally ensured Zen's commercial failure.

The benchmark in its current state is mostly the environment. There is no gameplay/AI/units yet so it is not indicative of final performance. As others said it is a "grass simulator" at this point.

But the environment can be one of the most stressful parts on a GPU and CPU. Look up GTA V. People with lower end systems, or even decent systems, have to lower just one options normally to get much better performance, the grass quality level.

Now true, this wont be indicative of real game performance but I wouldn't be surprised if a real game is similar to this. The only other "benchmark" is a game benchmark that was co-developed by AMD so it could easily have benefits for the GCN uArch and none for Maxwell.

We will only truly see in the near future as DX12 games start to trickle out. Maybe ARK will soon get a DX12 patch we can test with.

As for Jim, I think he left for a mix of all the reasons stated. AMD is in a very uncertain way right now and their survival depends on Zen being successful, their GPU division is just not able to keep the boat a-float anymore.

I hope it is but I just don't feel it. Maybe it is due to the way it is being presented feels a lot like K10/BD. I hope I am wrong.

Performance numbers are going to be more or less the same as it was for DX11 in most cases, since the CPU isn't the bottleneck, and the GPU is already tasked to capacity. You'll gain maybe 10% due to architectural improvements, but not much more then that. It's not like you can magically make the ROPs and Texture units go any faster...

 

[Vogner16]

Any Carrizo reviews yet?

lots just do a simple google search. decent ipc improvement great power efficiency improvement, but poor clocks and poor high power scaling. it basicly dies after 15W. they pump it up to 35W and get about 40% more performance for the extra 120% power. its a decent apu regardless. about i3 U series perf with great IGPU. all said and done, it should fit nicely with bottom end (AAA) gaming laptops and top end multimedia laptops. most laptops are priced around $650 with the FX8800p and that's a bit high but I you find one for $550 they are not bad.

EDIT: more like i3 to i5 haswell U series CPU performance

 

[de5_Roy]

lots just do a simple google search. decent ipc improvement great power efficiency improvement, but poor clocks and poor high power scaling. it basicly dies after 15W. they pump it up to 35W and get about 40% more performance for the extra 120% power. its a decent apu regardless. about i3 U series perf with great IGPU. all said and done, it should fit nicely with bottom end (AAA) gaming laptops and top end multimedia laptops. most laptops are priced around $650 with the FX8800p and that's a bit high but I you find one for $550 they are not bad.

EDIT: more like i3 to i5 haswell U series CPU performance

that is a spam post. it copies parts or all of an old post, embeds hidden urls of an image link and reposts it. check your reply's bbcode.

 

[Saga Lout]

Thanks for flagging that up - all removed now. It helps us a lot if you can report a post like that one by clicking on the exclamation mark in a triangle at the bottom right of the post concerned.

 

[Vogner16]

lots just do a simple google search. decent ipc improvement great power efficiency improvement, but poor clocks and poor high power scaling. it basicly dies after 15W. they pump it up to 35W and get about 40% more performance for the extra 120% power. its a decent apu regardless. about i3 U series perf with great IGPU. all said and done, it should fit nicely with bottom end (AAA) gaming laptops and top end multimedia laptops. most laptops are priced around $650 with the FX8800p and that's a bit high but I you find one for $550 they are not bad.

EDIT: more like i3 to i5 haswell U series CPU performance

that is a spam post. it copies parts or all of an old post, embeds hidden urls of an image link and reposts it. check your reply's bbcode.

yea I don't know what a bb code is or hidden urls are either :\ but if its spam you say then flag away

 

[de5_Roy]

yea I don't know what a bb code is or hidden urls are either :\ but if its spam you say then flag away

i sorta reported my suspicion about it recently, but i didn't think anyone would end up replying before mods took care of it. you can see the bbcode by clicking the bbcode button at the bottom-right area of each post. you can read the how-to here:
http://www.tomshardware.com/forum/id-2083458/read-forum-rules-styling-posts.html

 

[Vogner16]

http://wccftech.com/globalfoundries-14nm-finfet-amd-zen-2016/

AMD could to go with 14nm FF+ from Global Foundries and appears to be ahead of schedule with development.

anyone here know difference between LPP and LPE?

 

[jimmysmitty]

http://wccftech.com/globalfoundries-14nm-finfet-amd-zen-2016/

AMD could to go with 14nm FF+ from Global Foundries and appears to be ahead of schedule with development.

anyone here know difference between LPP and LPE?

http://www.extremetech.com/extreme/203318-samsung-nvidia-will-supposedly-collaborate-on-14nm-gpus-but-on-what-process-node

Samsung has two 14nm nodes: 14nm LPE and 14nm LPP. 14nm LPE stands for “Low Power Early,” and promises improved power consumption and performance, but the cream of the crop will arrive later, with 14nm LPP (Laser-Produced Plasma) and a further 15% improvement. Critically, however, both of these are low-power nodes with a specific focus on SoCs and IoT (Internet of Things) types of devices. To date, no manufacturer has announced that they intend to build a high-power product on a Samsung process node, and Samsung has no experience in building that kind of hardware.

If that is true then this process node might not be for Zen because Zen is a high powered product. I think that Samsungs S6 series uses their current Exynos which is their 14nm LPP.

 

[salgado18]

If that is true then this process node might not be for Zen because Zen is a high powered product. I think that Samsungs S6 series uses their current Exynos which is their 14nm LPP.

But Exynos has chips with 2.0 GHz, and that is within a very small power envelope. Why can't they make a bigger chip, also with 50%-80% more clocks, even if using 3x-4x the power, which is where a desktop cpu fits?

 

[-Fran-]

If that is true then this process node might not be for Zen because Zen is a high powered product. I think that Samsungs S6 series uses their current Exynos which is their 14nm LPP.

But Exynos has chips with 2.0 GHz, and that is within a very small power envelope. Why can't they make a bigger chip, also with 50%-80% more clocks, even if using 3x-4x the power, which is where a desktop cpu fits?

Uhm... In the most simple terms I could explain it, is because when you're putting transistors so close to each other, the current leak (electrons going to where they're not supposed to: tunnel effect) becomes a bigger problem and you need to have very small ranges of voltage (thus, power) to keep that under control. That implies the materials you use and the composition of them is *very* specific to the process node you want to tune for. And you have to think in the mili volt range here.

So, going from 2Ghz to, say, 3Ghz that might imply "just" a 50mV change, but in terms of "tuning the process" you might need a completely different tooling (hence node type) to sustain that speed with a decent enough leakage that the resulting product won't suck bowls of rotten cereal for that power envelope.

Cheers!

 

[jimmysmitty]

If that is true then this process node might not be for Zen because Zen is a high powered product. I think that Samsungs S6 series uses their current Exynos which is their 14nm LPP.

But Exynos has chips with 2.0 GHz, and that is within a very small power envelope. Why can't they make a bigger chip, also with 50%-80% more clocks, even if using 3x-4x the power, which is where a desktop cpu fits?

It is the same as why you can't just use a CPU node process for a GPU. They are tuned very differently and can accept different types of leakage amounts.

It requires a lot of work to redesign a process node for say a GPU.

 

[juanrga]

http://wccftech.com/globalfoundries-14nm-finfet-amd-zen-2016/

AMD could to go with 14nm FF+ from Global Foundries and appears to be ahead of schedule with development.

anyone here know difference between LPP and LPE?

http://www.extremetech.com/extreme/203318-samsung-nvidia-will-supposedly-collaborate-on-14nm-gpus-but-on-what-process-node

Samsung has two 14nm nodes: 14nm LPE and 14nm LPP. 14nm LPE stands for “Low Power Early,” and promises improved power consumption and performance, but the cream of the crop will arrive later, with 14nm LPP (Laser-Produced Plasma) and a further 15% improvement. Critically, however, both of these are low-power nodes with a specific focus on SoCs and IoT (Internet of Things) types of devices. To date, no manufacturer has announced that they intend to build a high-power product on a Samsung process node, and Samsung has no experience in building that kind of hardware.

If that is true then this process node might not be for Zen because Zen is a high powered product. I think that Samsungs S6 series uses their current Exynos which is their 14nm LPP.

Zen will be using a tweaked node exclusively optimized by Glofo, not the standard LPP node for mobile. Somewhat like Kaveri uses a custom process (28SHP) instead the standard GF28A for everyone else.

 

[Vogner16]

14nm FinFET Technology
•14LPE – Early time-to-market version with area and power benefits for mobility applications
•14LPP – Enhanced version with higher performance and lower power; a full platform offering with MPW, IP enablement and wide application coverage

http://www.globalfoundries.com/technology-solutions/leading-edge-technology/14-lpe-lpp

looks to me like GF lpp is higher end than IoT and smartphones :/

still agree with you juanrga, they will have a semicustom node production process to perfect the ability of 14nm. having said that do you think they would name anything high power node today as there is a huge push from intel and apple with fanless super low TDP thin laptops as well as 2 in1's using U series cpu's. im kinda thinking that (on a PR sense) nobody would willingly call their new node high power because that makes them look behind the curve.

EDIT: GoFo has 2 main standard 28 processes. 28 SLP and 28 HPP but yes neither are what amd used with kaveri

 

[juanrga]

14nm FinFET Technology
•14LPE – Early time-to-market version with area and power benefits for mobility applications
•14LPP – Enhanced version with higher performance and lower power; a full platform offering with MPW, IP enablement and wide application coverage

http://www.globalfoundries.com/technology-solutions/leading-edge-technology/14-lpe-lpp

looks to me like GF lpp is higher end than IoT and smartphones :/

still agree with you juanrga, they will have a semicustom node production process to perfect the ability of 14nm. having said that do you think they would name anything high power node today as there is a huge push from intel and apple with fanless super low TDP thin laptops as well as 2 in1's using U series cpu's. im kinda thinking that (on a PR sense) nobody would willingly call their new node high power because that makes them look behind the curve.

EDIT: GoFo has 2 main standard 28 processes. 28 SLP and 28 HPP but yes neither are what amd used with kaveri

Glofo is licensing the nodes from Samsung, and Samsung claims that LPP is only 10% enhanced over LPE. Both are mobile-oriented nodes. We have know this for several years now.

http://www.samsung.com/semiconductor/foundry/process-technology/14nm/

 

[salgado18]

Uhm... In the most simple terms I could explain it, is because when you're putting transistors so close to each other, the current leak (electrons going to where they're not supposed to: tunnel effect) becomes a bigger problem and you need to have very small ranges of voltage (thus, power) to keep that under control. That implies the materials you use and the composition of them is *very* specific to the process node you want to tune for. And you have to think in the mili volt range here.

So, going from 2Ghz to, say, 3Ghz that might imply "just" a 50mV change, but in terms of "tuning the process" you might need a completely different tooling (hence node type) to sustain that speed with a decent enough leakage that the resulting product won't suck bowls of rotten cereal for that power envelope.

Cheers!

Thanks for the explanation, Yuka! That's very easy to understand for a software guy

 

[Vogner16]

14nm FinFET Technology
•14LPE – Early time-to-market version with area and power benefits for mobility applications
•14LPP – Enhanced version with higher performance and lower power; a full platform offering with MPW, IP enablement and wide application coverage

http://www.globalfoundries.com/technology-solutions/leading-edge-technology/14-lpe-lpp

looks to me like GF lpp is higher end than IoT and smartphones :/

still agree with you juanrga, they will have a semicustom node production process to perfect the ability of 14nm. having said that do you think they would name anything high power node today as there is a huge push from intel and apple with fanless super low TDP thin laptops as well as 2 in1's using U series cpu's. im kinda thinking that (on a PR sense) nobody would willingly call their new node high power because that makes them look behind the curve.

EDIT: GoFo has 2 main standard 28 processes. 28 SLP and 28 HPP but yes neither are what amd used with kaveri

Glofo is licensing the nodes from Samsung, and Samsung claims that LPP is only 10% enhanced over LPE. Both are mobile-oriented nodes. We have know this for several years now.

http://www.samsung.com/semiconductor/foundry/process-technology/14nm/

Thank you guys so much your a wealth of information that I would have never found otherwise. it helps me sort through the crap on the internet and some really solid information on process. as an engineer I personally always want to know the low down information regarding the difference between methods of creating 14nm chips and how they are made and what is the future nodes to be used. I love this stuff thank you guys so much!

could anyone do a bit of an explanation on FF+? I know it has something to do with "pointier taller channels for holding copper channels" to maintain current flow while reducing space laterally on the die and still reducing leakage. Is this similar to what Samsung has done with "3D vnand" taking planner cells and folding them up to decrease horizontal space??

 

[gamerk316]

http://techreport.com/news/29119/report-amd-silver-lake-in-stalled-talks-for-25-stake#0

Confirms there were talks for SL to purchase 25% of AMD, but AMD walked away over pricing. AMD better be careful not to overvalue itself...

 

[-Fran-]

http://techreport.com/news/29119/report-amd-silver-lake-in-stalled-talks-for-25-stake#0

Confirms there were talks for SL to purchase 25% of AMD, but AMD walked away over pricing. AMD better be careful not to overvalue itself...

It's Silver Lake we're talking about here. I read that as: "SL offered 10% of actual stock value per share, then AMD smiled and walked away". AMD might have made the right decision here. ESPECIALLY when SL wanted to take control of decisions. SL doesn't know or even want to know about Tech, they want quick money.

Cheers! 😛

EDIT:

could anyone do a bit of an explanation on FF+? I know it has something to do with "pointier taller channels for holding copper channels" to maintain current flow while reducing space laterally on the die and still reducing leakage. Is this similar to what Samsung has done with "3D vnand" taking planner cells and folding them up to decrease horizontal space??

You will get into electron movement properties against materials and their geometry; that is as close as you can get to Quantum Physics without talking in probabilistic trajectories XD. That is way too much for this thread IMO 😛

 

[jimmysmitty]

http://techreport.com/news/29119/report-amd-silver-lake-in-stalled-talks-for-25-stake#0

Confirms there were talks for SL to purchase 25% of AMD, but AMD walked away over pricing. AMD better be careful not to overvalue itself...

AMD has a history of over valuing things. They over valued ATI and paid way too much for them.

So looks like no cash infusion just yet. Maybe another will come in for that.

http://techreport.com/news/29119/report-amd-silver-lake-in-stalled-talks-for-25-stake#0

Confirms there were talks for SL to purchase 25% of AMD, but AMD walked away over pricing. AMD better be careful not to overvalue itself...

It's Silver Lake we're talking about here. I read that as: "SL offered 10% of actual stock value per share, then AMD smiled and walked away". AMD might have made the right decision here. ESPECIALLY when SL wanted to take control of decisions. SL doesn't know or even want to know about Tech, they want quick money.

Cheers! 😛

EDIT:

could anyone do a bit of an explanation on FF+? I know it has something to do with "pointier taller channels for holding copper channels" to maintain current flow while reducing space laterally on the die and still reducing leakage. Is this similar to what Samsung has done with "3D vnand" taking planner cells and folding them up to decrease horizontal space??

You will get into electron movement properties against materials and their geometry; that is as close as you can get to Quantum Physics without talking in probabilistic trajectories XD. That is way too much for this thread IMO 😛

Sometimes you don't need a leader who understands the technology but who understands the market and knows how to move you in the right direction for a profit.

Look at Ford back when Alan Mulally was CEO. He came from Boeing and probably knew very little about cars and the tech behind them compared to planes. Yet when the recession hit and GM and Chrysler were both hurting for cash Ford was fine and needed no government assistance and now is profitable and making very highly rated cars. Hell we are even finally getting once European exclusives like the Focus RS.

It is all about having good leadership, not just someone who knows technology. I can actually say that most people who really know technology are also very bad at making good business decisions.