News AMD Shows New 3D V-Cache Ryzen Chiplets, up to 192MB of L3 Cache Per Chip, 15% Gaming Improvement

[Admin]

AMD CEO Lisa Su revealed that the company is beginning production of chips with 3D-stacked SRAM this year, changing the game entirely.

AMD Shows New 3D V-Cache Ryzen Chiplets, up to 192MB of L3 Cache Per Chip, 15% Gaming Improvement : Read more

 

[Dragonwatcher]

Next step a terminator type 3-dimensional CPU. Followed very closely by skynet v1.0. But other than that frikken AWESOME. Wonder what it is going to slot into AM4 or AM5.

 

[dehjomz]

Did this just make Alder Lake-S irrelevant? I was rooting for Intel, but I don’t know how they’re gonna compete with this…

 

[turbomode99]

Cache has diminishing returns after a certain point and also with larger cache sizes, latency tends to increase. We'll see how it ends up performing.

 

[CerianK]

Wonder what it is going to slot into AM4 or AM5.

It was shown on 5900X and directly compared, so likely both AM4 and AM5 moving forward (unless AM5 is segmented away from it, e.g. only TR and Epyc).

 

[jasonkaler]

Cache has diminishing returns after a certain point and also with larger cache sizes, latency tends to increase. We'll see how it ends up performing.

Every time you double the size of the cache you increase its performance by 50%

 

[dave.jeffers]

Did this just make Alder Lake-S irrelevant? I was rooting for Intel, but I don’t know how they’re gonna compete with this…

ummm, I think so!

 

[Kamen Rider Blade]

Is there any other material they could place inside parts of the Structural Silicon to help transfer heat away from the die?

 

[hotaru251]

Is there any other material they could place inside parts of the Structural Silicon to help transfer heat away from the die?

not really.

There are testing being done with actual nano sized watercooling built into dies but still not an actual thing that might come to market.

 

[nitrium]

Intel might actually be forced to innovate for a change. The last time that happened was when AMD released the Athlon 64 series of CPUs back in 2004/2005.

 

[hotaru.hino]

Intel might actually be forced to innovate for a change. The last time that happened was when AMD released the Athlon 64 series of CPUs back in 2004/2005.

Intel has been innovating. The problem is they don't have anything to show for it because of the woes trying to get off 14nm.

 

[TerryLaze]

Did this just make Alder Lake-S irrelevant? I was rooting for Intel, but I don’t know how they’re gonna compete with this…

Do you have any idea how expensive cache is?! These are going to be anything BUT competitive for gamers, although against AL extra cores aren't cheap either so we will have to wait and see.

Especially since the cache only helps 15% in benches it will be next to unnoticeable in normal gameplay/ games that don't come with a bench.

 

[VforV]

This is the 2nd best news after AMD FSR announcement.

I also believe with this new tech, Intel with Alder Lake will have a repeat experience like with their crash and burn Rocket Lake...

If this is on Zen4, it will be on top of IPC increase, core clock increase and possible core count increase. So it's like another ace up their sleeve...

My only question is if this tech will come in a Zen3+ Refresh too or only in Zen4?

AMD keeps punching intel to death and then kicks it too, it's so good to have this relentless fight at this high level. Even though I'm excited about what AMD does, I don't want intel actually defeated, so I hope they can rise (to Ryzen? and put up a good fight.

 

[TheJoker2020]

Intel had a headache, now it has a full blown migraine

Now both intel and nVidia are wondering if AMD will do exactly the same thing with their GPU's and the quantity of cache gets that bit closer to "infinity", which makes you wonder whether AMD has had this in the works for years, and this is exactly why they called it "infinity cache" I think that they did, and that this has been a very well guarded and close kept secret, not just from AMD, but also TSMC.

Well done guys 👏

 

[Sleepy_Hollowed]

Ooof, this extra cache will be amazing for workstations and server loads, shots are fired.

I remember Intel had a similar approach but with cheaper, slower L4 cache on some of their crystalwell CPUs, but they stopped, possibly due to costs or being limited by heat.

I would love to have one of these new CPUs, especially if they're on the same AM4 boards, though that's doubtful.

 

[InvalidError]

It was shown on 5900X and directly compared, so likely both AM4 and AM5 moving forward (unless AM5 is segmented away from it, e.g. only TR and Epyc).

Since AMD was speaking about gaming performance, this 64MB 128MB cache should be a mainstream thing at least on select gaming SKUs. Lower-end SKUs will likely use cache die defects for 32-56MB 64-112MB extra L3$.

(Edit: with the structural silicon, there may be smaller cache die or even models with none at all. On 7nm, 128MB would be pretty close to a whole CCD-sized die, not just a center sliver shown in illustrations.)

 

[-Fran-]

I love the concept, but I have to say I'm wary of thermals in the way they described how they'll be doing the "ground leveling" of the surface.

Throwing more memory if the price increase is low... Sure, why not? Will it be cheap though? Hm... Doubt it, so this may only be a feature for TR-class or Ry-69x0-class. I'd love it if they released a Zen3 refresh with this just bolted on as a "preview" for enthusiasts. I'm sure that nieche market would pay whatever premium they ask for.

I seriously doubt this will make its way to lower SKUs. With the "G" and mobile APUs they made clear they'll be uplifting their monolithic dies and then the chiplets will cover the higher end of the performance spectrum, but will keep them separated. Or that's what I think.

Cheers!

 

[TerryLaze]

Since AMD was speaking about gaming performance, this 64MB cache should be a mainstream thing at least on select gaming SKUs. Lower-end SKUs will likely use cache die defects for 32-56MB extra L3$.

Show gaming results and you will be picked up by all the gaming sites that are more in numbers and have more visitors instead of only being reported about by highly technical sites.
Especially now where everything is rare and expensive a CPU with that much more cache will be way too expensive for the main stream gamer.

 

[-Fran-]

Show gaming results and you will be picked up by all the gaming sites that are more in numbers and have more visitors instead of only being reported about by highly technical sites.
Especially now where everything is rare and expensive a CPU with that much more cache will be way too expensive for the main stream gamer.

Well, there's people paying about $1K for the 5950X to game and also do some light pro work that doesn't require the extra memory complexity from TR and still needs the CPU grunt.

You could argue how big or small that market is, but nothing prevents AMD from making a halo product using this. Intel has done it as well with Haswell and I don't remember anyone really getting that CPU at all.

I would say this is not a gimmick, like at all, but I would agree this won't make it to mainstream (or lower SKUs). Or, at least, I wouldn't say AMD will be able to pull any magic tricks there. If they can put a CPU with SRAM for about $300 then they'll take that market (and up, probably) by storm. I just don't see how Alder Lake will be able to compete there.

Regards.

 

[Findecanor]

Cache has diminishing returns after a certain point and also with larger cache sizes, latency tends to increase.

The length a signal can travel within a single clock cycle is limited by the speed of light, and this limits the area of cache you could have on the same plane, beside the cores, accessible within that clock cycle.
That rule is broken here by going to the third dimension, and thus not increasing the chip area.

 

[watzupken]

While I think AMD is doing very well, I am starting to wonder if this every increasing cache size is sustainable. AMD's solution on CPU and GPU seems to be quite similar, slap an oversized cache to improve performance. Cache takes up a lot of die space and even if you can stack it, there is still a limit to the height and width of the chip.

 

[InvalidError]

You could argue how big or small that market is, but nothing prevents AMD from making a halo product using this. Intel has done it as well with Haswell and I don't remember anyone really getting that CPU at all.

Haswell was wildly successful and broadly available. Broadwell was the super-special kid that most people knew existed but never met.

The length a signal can travel within a single clock cycle is limited by the speed of light, and this limits the area of cache you could have on the same plane, beside the cores, accessible within that clock cycle.
That rule is broken here by going to the third dimension, and thus not increasing the chip area.

The speed of light "limit" only applies to a passive wire, it goes out the window once it hits logic which is much slower. Access to cache also has to go through arbitration logic and tag-RAM lookups. More logic between the cache and what needs access to it usually means higher latency by a cycle or two every time size gets doubled.

 

[digitalgriffin]

Do you have any idea how expensive cache is?! These are going to be anything BUT competitive for gamers, although against AL extra cores aren't cheap either so we will have to wait and see.

Especially since the cache only helps 15% in benches it will be next to unnoticeable in normal gameplay/ games that don't come with a bench.

IF you read the article 15% was in gaming at 1080p

 

[alceryes]

Especially since the cache only helps 15% in benches it will be next to unnoticeable in normal gameplay/ games that don't come with a bench.

...but the bragging rights?! Ohh the bragging rights!
Jokes aside, 15% can make a significant difference if you're hovering around 60FPS. I have several questions around latency, heat, cost, necessary optimizations, etc..

 

[digitalgriffin]

What's very curious and IMPORTANT to note here is they locked the processor at 4GHz. We all know the 5900X can run at considerably higher speeds here.

10:1 They are thermal throttling. Note the lack of thermals.

Call me crazy but eventually sockets will have cooling from below and above working in a compression fashion where each heat sink (front and back) pull against each other.