Windows and Linux don't have a clue what application prefers what level of cache and neither can a scheduler. The article literally makes it sound like they're whitelisting, and using the scheduler to make sure the games stay where they're supposed to:
AMD is working with Microsoft on Windows optimizations that will work in tandem with a new AMD chipset driver to identify games that prefer the increased L3 cache capacity and pin them into the CCD with the stacked cache. Other games that prefer higher frequencies more than increased L3 cache will be pinned into the bare CCD. AMD says that the bare chiplet can access the stacked L3 cache in the adjacent chiplet, but this isn’t optimal and will be rare.
What about non gaming workloads? What are they doing to prevent the wrong CCD accessing the extra cache? They haven't announced that they have any sort of hardware solution built into the chips (like thread director) so I'm assuming they don't have one just because they'd be touting it if they did. There is no easy way, aside from a whitelist, for AMD to dictate what goes where due to the fact that they wouldn't know up front which to choose. In the case of P/E cores starting with the P cores is
always the right choice and the problems have been when that doesn't happen. There is
no always case for AMD here, so I don't know how you think the two are the same.
edit: I suppose AMD could do something like a machine learning algorithm for cache hits, but I'm pretty sure this would need a hardware solution similar to what nvidia does to enable dlss.