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It is not an engineering sample. It is an qualifications sample.
 
AMD Launches Embedded Ryzen and Epyc Processors
by Hilbert Hagedoorn on: 02/21/2018 03:05 PM
http://www.guru3d.com/news-story/amd-launches-embedded-ryzen-and-epyc-processors.html
index.php

AMD today introduced two new product families – the EPYC Embedded 3000 processor and Ryzen Embedded V1000 processor – to enter a new age for high-performance embedded processors. EPYC Embedded 3000 brings the power of Zen to a variety of new markets including networking, storage and edge computing devices, while AMD Ryzen Embedded V1000 targets medical imaging, industrial systems, digital gaming and thin clients.

These new AMD Embedded processors deliver breakthrough performance, exceptional integration and on-chip security.

“Today we extend the high-performance x86 ‘Zen’ architecture from PCs, laptops and the datacenter to networking, storage and industrial solutions with the AMD EPYC Embedded and AMD Ryzen Embedded product families, delivering transformative performance from the core to the edge,” said Scott Aylor, corporate vice president and general manager, Datacenter and Embedded Solutions Business Group, AMD. “AMD EPYC Embedded 3000 raises the bar in performance for next-generation network functions virtualization, software-defined networking and networked storage applications. AMD Ryzen Embedded V1000 brings together the ‘Zen’ core architecture and ‘Vega’ graphics architecture to deliver brilliant graphics in a single chip that provides space and power savings for medical imaging, gaming and industrial systems. With these high-performance products, AMD is ushering in a new age for embedded processors.”
AMD EPYC Embedded 3000 Product Overview


  • Highly scalable processor family with designs ranging from four cores to 16 cores, available in single-thread and multi-threaded configurations.
    Support for thermal design power (TDP) ranges from 30W to 100W.
    Expansive, integrated I/O with support for up to 64 PCIe® lanes and up to eight channels of 10 GbE.
    Up to 32MB shared L3 cache with up to four independent memory channels.
    Unparalleled enterprise-grade RAS to address data detection, correction, recovery and containment, helping ensure that systems are continuously running even under the most stringent enterprise environments.
    On-board secure processor for crypto co-processing, SME to defend against unauthorized physical memory access, and SEV for encrypting VM memory to help protect against various administrator attacks without disrupting application codes.
    Product availability for up to 10 years, offering customers a long lifecycle support roadmap.
AMD Ryzen Embedded V1000 Product Overview


  • Breakthrough Accelerated Processing Unit (APU) coupling high-performance ‘Zen’ CPUs and ‘Vega’ GPUs on a single die, offering up to four CPU cores/eight threads and up to 11 GPU compute units to achieve processing throughput as high as 3.6 TFLOPS7.
    By combining the power of ‘Zen’ and ‘Vega’ architectures, the Ryzen Embedded V1000 family can deliver up to 200 percent more performance compared to previous generations5.
    Support for TDP ranges from 12W to 54W, enabling scalability for high-performance devices and reduced power consumption for energy-conscious applications.
    Robust I/O capabilities that support up to 16 PCIe lanes, dual 10 GbE and expansive USB options, including up to four USB 3.1/USB-C interconnects, with additional USB, SATA and NVMe support.
    Incredible resolution in a small package, driving up to four independent displays running in 4K, with the ability to support 5K graphics for applications demanding next-generation visual clarity, including support for H.265 decode and encode, and VP9 decode8.
    Equipped with dual-channel 64-bit DDR4, with performance up to 3200 MT/s.
    On-board secure processor for crypto co-processing, SME to defend against unauthorized physical memory access, and SEV for encrypting VM memory to help protect against various administrator attacks without disrupting application codes.
    Product availability for up to 10 years, offering customers a long lifecycle support roadmap
.
Click to expand...

WOW!
 


The scores aren't comparable, because correspond to very different versions of Geekbench: 4.2.2 vs 4.0.3. Also the caches are reported wrong, which can indicate some other problem.

Here you have an entry for R5 1600 with caches reported correctly and the chip scores 4263 in single core, which is higher than the score for the 1600X you are using. Still the versions are sightly different and cannot be compared directly.
 


Yeah, I've come to the conclusion that geekbench.com has too many inconsistencies to make a good comparison. Without known quantities as a point reference I feel like I"m just wasting my with it.
 


Speaking as someone who uses embedded processors on a good half dozen different projects:

Meh.

There's a reason why most embedded chips I use on a day to day basis are either ancient CPU architectures (z80/68k/i286) or Power PC (PPC6xx/PPC7xx) based. Thermals matter more then performance, and no matter how much you slim x86 down, it's still going to have unfavorable thermal attributes.
 


I'm curious why not ARM derivatives are included there. Some of them are really frugal energywise.
 
Interview to Gary Patton, CTO of GlobalFoundries
https://www.anandtech.com/show/12438/the-future-of-silicon-an-exclusive-interview-with-dr-gary-patton-cto-of-globalfoundries

Q6: So was 12LP originally called 14+?

GP: No, and we never really had a 14+ per se. We have had what we call BKM, which relates to ‘performance bump’ improvements. I think some companies would call it a plus, you would call it a plus. But 12LP is a completely separate thing, so we had customers who were pushing us for some density improvement and so we did some optimization of the middle line and back-end - it's not a pure optical shrink. We wanted to do it with minimum disruption to the design IP that had already been developed, for time to market.
Click to expand...
Q15: With the first generation of 7nm, do you expect to be high volume production by the end of the year?

GP: By the end of the year or most likely in early 2019, with a couple of key partners. Our ASIC customers, of which there are quite a few, are also lead users of our 7nm process.
Click to expand...
Q17: Does the first generation of 7LP target higher frequency clocks than 14LPP?

GP: Definitely. It is a big performance boost - we quoted around 40%. I don't know how that exactly will translate into frequency, but I would guess that it should be able to get up in the 5GHz range, I would expect.

Q18: So you would do a custom version of 7LP for IBM, who is currently running 5.2GHz on its 10 core chips - could you also perhaps translate that 40%?

GP: I'm not a system guy so I wouldn't want to commit IBM to it! But certainly, we are very focused on delivering to IBM the performance they need for the next generation, for power and integration into systems. Some of us have worked with them for many years, so we have a good understanding of what they need.
Click to expand...
 


To answer directly, I think we can expect you complaining about the mild bumps and accusing AMD of foulplay with them... For some reason...

You think they are "upgrades", I think they are just fixes to the original design that comes with the speedup as a benefit. They already said it: the stock speeds are now more stable and with less problems than gen1 of the chipset. And this is allowing intra-operability! How long was it that Intel has done that? Pentium 2 and 3?
 


Mostly newness. Remember a lot of embedded systems go through a good 5 year development cycle, with the HW specifications generally a good 3-4+ years prior to that. I suspect ARM will gradually displace PPC at the high end of the market, but you won't really see that in actual products for at least another five years.
 

So Patton not only contradicts AMD, but also contradicts himself. LOL

Older AMD roadmaps show the 14nm+ node

5444308a-97e7-4221-a84a-0c7031a6579f.jpg


AMD's James Prior confirmed that Raven Ridge uses 14nm+. And in a former interview Patton confirmed that 12LP is only "an extension of 14nm".

So I find funny that Patton pretends now that 14nm+ never existed...

Note how Patton doesn't equate the marketing 40% figure to frequency. He only "guess" that 7nm "should be" able to get up in the 5GHz range. Those 6GHz and 7GHz some people was expecting were pipedreams.

The whole interview is full of marketing pearls. The answer to Q22 caught my attention. Patton pretends that Globalfoundries doesn't care "what other semiconductor manufacturers call their processes". But this is obviously false. Globalfoundries cares and it cares a lot of. That is why they choose the name 7nm for a process node is not 7nm. A true 7nm shrink would provide 4x higher density than a 14nm node. Their "7nm" node only provides about 2x the density. The name "7nm" was a marketing choice to look more advanced than competitors like Intel.
 

https://www.reddit.com/r/Amd/comments/7s56pd/the_upcoming_ryzen_apus_seem_to_already_be_the/dt2kxpt/
The upcoming Ryzen APUs seem to already be the Ryzen 2nd gen cores (Zen+) [6:48] Thoughts?
Submitted 1 month ago by TheJoker1432
]AMD_jamesProduct Manager 39 points 1 month ago
They're 14nm+.

[–]rigredAMD Ryzen 7 1700X | 2x RX 580 CF 11 points 1 month ago
Thanks for confirming. Perhaps the site needs to be changed to reflect that.

Do you know of a source or can provide some info that can explain what improvements this brings?

Details on 14nm+ are rather sparse. I presume this is a small incremental improvement with some fixes, but only very minor performance increase.

[–]AMD_jamesProduct Manager 34 points 1 month ago
The main benefit is it offers a lower voltage for the frequency. From a product perspective this allows us to define improved frequency voltage curves that give higher frequencies for a specific workload - this is referred to as Precision Boost 2.

I'm not sure 14nm vs 14nm+ is a enough of a primary selling point for these products, that it would warrant addition to the website. But it is interesting enough for the technical media and enthusiast community to want to discuss.

[–]aruthk 9 points 1 month ago*
Thanks for your responses here James!

Hopefully this translates to better max cpu overclocks on ryzen 2000 series (both raven and pinnacle). Can you provide any more info on that?

[–]AMD_jamesProduct Manager 32 points 1 month ago
Early days on the Ryzen 5 2400G but we saw 4.2GHz with an air cooler (original Wraith Max), at our recent CES media event we had a live demo of 3.9GHZ all cores with DDR4-3600 memory, and processor graphics clock of 1675MHz (vs. base 1250MHz). That was primarily because we wanted to show off the graphics headroom.

I would consider that best case and not common because I don't have any data on a broad sweep of processors, this was a production CPU but I don't know the bounds.

I hope it's easier to get 4GHz+ on air with 2400G/2200G than we've seen before, but we'll have to wait till they launch and a number of people get their hands on them in the wild before we get a good feel for it.

[–]Skulldingoi7 7700k | EVGA 1080Ti Black Edition 9 points 1 month ago
Does Ryzen+ have an improved IMC? The reliance upon Samsung b bie to get the most out of the current chips is a bit of a hassle, and a big stumbling block for new/first time builders.

[–]AMD_jamesProduct Manager 24 points 1 month ago
We've made a number of improvements to the platform to help address memory compatibility, particularly overclocked memory. AFAIK JEDEC memory is very stable, whether it is Hynix, Micron, or Samsung. For the 2nd Gen Ryzen we made some improvements to memory latency, and cache latency. The 400 Series motherboards are designed to improve memory stability and overclocking.
Click to expand...

AMD_jamesProduct Manager describes the 2400G and 2200G APUs as basically 14nm, which he calls 14nm+, with a small improvement, but makes no mention of the 12nm products yet to be released. These APUs as seen discussed previously in a video only have some characteristics of the 12nm processors Precision Boost 2, and better RAM compatibility.
The main benefit is it offers a lower voltage for the frequency. From a product perspective this allows us to define improved frequency voltage curves that give higher frequencies for a specific workload - this is referred to as Precision Boost 2.
Click to expand...
These products are already released and we know that they are not capable of higher top end frequencies similar to 14nm Ryzen, but they have lower voltages with better RAM compatibility.

https://www.anandtech.com/show/12438/the-future-of-silicon-an-exclusive-interview-with-dr-gary-patton-cto-of-globalfoundries?_ga=2.234326238.1302477664.1518393516-1732219874.1517885173
Q6: So was 12LP originally called 14+?

GP: No, and we never really had a 14+ per se. We have had what we call BKM, which relates to ‘performance bump’ improvements. I think some companies would call it a plus, you would call it a plus. But 12LP is a completely separate thing, so we had customers who were pushing us for some density improvement and so we did some optimization of the middle line and back-end - it's not a pure optical shrink. We wanted to do it with minimum disruption to the design IP that had already been developed, for time to market.

Q7: So it's not a pure optical shrink, so there is a partial optical shrink?

GP: Yes, the middle line and back-end (BEOL) is where we did our tuning.

Q8: So is 12LP in high volume manufacturing now?

GP: It is ramping with Q1 production. We will be ramping through the year.

Q9: As far as what we've been able to determine, the difference between 14LPP and 12LP is just a difference in going from 9T to 7.5T design, with that tuning. Are there other changes?

GP: Along with the track changes, we also changed the middle and back-end-of-line ground rules. One thing that I think we're noting is that the industry focuses a lot on pitches, but that's like having half the story. So much of it is also all the little subtle secondary ground rules.

For example, we have a shrink on our 7nm from 14nm that is 0.37x scale. So it's more than 50% scale at a logic library level. When we first started, we were more like 0.50x or 0.55x and then there was a lot of work with our partners on all the secondary ground rules. How you route the wiring played such a huge role.

At least one of our competitors spends a lot of time talking about the pitches and the things like that, but at the end of the day, a lot of it is how you develop all the rules for the back end and how you develop the routing. We went from 0.50x to 0.37x without changing the pitches. It was all optimization of these secondary ground rules.

For something like 12LP, we try to make it as seamless as possible for our customers. They've invested all this money in the platform, but with the minimal investment, they want to be able to get improvements and enhancements because it is taking longer to get from node to node.

We will intentionally skip 10nm. I call 10nm more of a ‘half-node’ you know, and there are some people who are very focused on the Christmas season. Therefore they have to get something out and it may not have a great deal of improvement for you.
Click to expand...

Q6: So was 12LP originally called 14+?

GP: No, and we never really had a 14+ per se. We have had what we call BKM, which relates to ‘performance bump’ improvements. I think some companies would call it a plus, you would call it a plus. But 12LP is a completely separate thing, so we had customers who were pushing us for some density improvement and so we did some optimization of the middle line and back-end - it's not a pure optical shrink.
Click to expand...
Q7: So it's not a pure optical shrink, so there is a partial optical shrink?

GP: Yes, the middle line and back-end (BEOL) is where we did our tuning.
Click to expand...
Q9: As far as what we've been able to determine, the difference between 14LPP and 12LP is just a difference in going from 9T to 7.5T design, with that tuning. Are there other changes?

GP: Along with the track changes, we also changed the middle and back-end-of-line ground rules.
Click to expand...

Patton admits they didn't have a 14nm+ but improved upon the original design in what he calls "BKM". This would be the Precision Boost 2. Immediately following that statement he tells you that 12nm is a completely separate thing, which is a density improvement via optical shrink with tuning to the BEOL.

Juangra you are miss interpreting the information and making bad inferences. While the 2400G and 2200G are 2000 series they are not 12nm parts. Mainly they adopted Precision Boost 2, so not entirely the original 14nm Ryzen process, and thus labeled 2000 series. You started incorporating 14nm+ and 12nm after watching the video here
http://www.tomshardware.com/forum/id-3341285/amd-naples-server-cpu-info-rumours/page-26.html#20625882
You dismissed my statements and misinterpreted the video, and my statements were as followed.
If you watch the video he says these are similar with desktop in the way they deliver power to the CPU, precision boost higher frequencies at lower voltages, but the desktop CPUs are 12nm. We have some sample going out to partners they are not full performance or final product yet.
https://youtu.be/7MPxN6MEgbk?t=400
Click to expand...
And your statement afterward:
12nm is a marketing name for 14nm+.
Click to expand...

You criticize Patton here, and across other media outlets as well with these miss interpretations. It might be wise to update those statements before 12nm arrives.


edit: fixed some typos.
 
You quoted AMD's James Prior confirming that the Raven Ridge APUs are "14nm+". And it explains some of the advantages of 14nm+ over the older 14nm: "The main benefit is it offers a lower voltage for the frequency."

The existence of the 14nm+ node was also confirmed in the older AMD roadmaps, before the marketing relabels. I proved this by showing the older roadmaps mentioning 14nm+ and the new roadmaps where 14nm+ has been relabeled to 12nm.

I criticize Patton because he contradicts what AMD says and because he contradicts what he said before in the semiengineering article, where he had confirmed that 12nm was simply an extension of 14nm, aka 14nm+.

This is all marketing at this point. Just as they naming "7nm" to a node is not 7nm, because a true shrink to 7nm would bring ~4x mode density than their current 14nm.

Precisely the semiengineering article focus on how foundries are "spreading confusion" with marketing names of nodes.
 


https://semiengineering.com/nodes-vs-node-lets/
“Some will stay at 14nm and jump straight to 7nm,” GlobalFoundries’ Patton said. “Some are looking for an extension of 14nm.”
For example, 12nm is an extension of 16nm/14nm. It provides slightly better performance than 16nm/14nm.
Click to expand...

This is not a direct quote from Patton, but the statements above that are. The straight extension we see today is 2400G and 2200G that are nearly identical to 14nm Ryzen with lower voltages from Precision Boost 2. 12nm desktop parts have yet to be released, which will feature 7.5T libraries and BEOL tuning, which constitutes a minor density improvement.
Q6: So was 12LP originally called 14+?

GP: No, and we never really had a 14+ per se. We have had what we call BKM, which relates to ‘performance bump’ improvements. I think some companies would call it a plus, you would call it a plus. But 12LP is a completely separate thing, so we had customers who were pushing us for some density improvement and so we did some optimization of the middle line and back-end - it's not a pure optical shrink.
Click to expand...

He admits some companies would call it 14+, but that he would not consider it 14nm+, and refers it to a BKM. This also points to a 12nm, if only a marketing name, that will differ from 2400G and 2200G that was recently released. There are three separate products here. So, I would be carefully calling it a contradiction, when he says other companies would call it 14nm+, AMD, but he calls it BKM. And it's all been marketing since 28nm, Intel is closer than other foundries in it's marketing. Intel's 14nm is not exactly 14nm, but closer in naming than the others.
 


And Patton's statements refer to the 12nm node. He mentions the two possible evolutions for Glofo customers: go from current 14nm to 7nm or go from current 14nm to 14nm+ (aka 12nm). The whole semienginering article is about how 'nodes' as "12nm and 11nm are slightly more advanced versions of 16nm/14nm."



Raven Ridge is made on 14nm+ as confirmed by AMD's James Prior. As he explains the new node "offers a lower voltage for the frequency". And this improved V/F curve is used in Precision Boost 2 to provide higher clocks. He also explain how the improved node allow to get 4.2GHz overclocks.

Changing libraries don't change the node. At each node different libraries are available, and that is why for each node we have different SRAM cell densities depending if one uses high-density libraries or low-density libraries (often named high-performance) and 'tunning' doesn't deserve a new node. Intel also does tunning in its nodes. E.g. the 22nm was in reality composed of two subprocesses P1270 and P1271: one tunned for desktop and the other tunned for mobile.



Glofo did refer to this node as 14nm+ and that is why AMD included a 14nm+ node in the old roadmaps. AMD doesn't invent the name of the nodes. This is information that Glofo gives to AMD. Glofo gave AMD the names 14nm+, 7nm, and 7nm+ and when would be ready and AMD adds that information to the roadmaps. Patton himself also referred to this node as 14nm+, in the past, but he did in textual form "an extension of 14nm".

Intel departed from ITRS rules in the 65nm node, but since then any node has been a strict shrink of the former node

Cell-size.png


The other foundries departed from rules in the 14/16nm nodes, and they are doing it again with all those 12/11/7nm nodelets and nodes.

20-->14nm would bring 2x more density. Glofo 14LPP is only 15% more dense.
14-->12nm would bring 35% more density. Glofo 12LP is only 15% more dense than TSMC 16nm.
14-->7nm would bring 4x more density. Glofo 7LP is only ~2x more dense than 14LPP.

There are difference between fooling us one time and fooling us continuously. Glofo 7nm only provides about 2.5 more density than 20nm. So in reality is would be named a 12nm or so. But it is named 7nm for marketing purposes. This is all well explained in the semiengineering article:

In fact, some chipmakers tout node names to show leadership position in the process race. In reality, however, these are arbitrary numbers, and many industry insiders characterize them as simply marketing terms.
Click to expand...

The funny part is not that foundries are trying to fool us with marketing names for the nodes, but some even pretend to hide it. Paton himself now pretends to convince us that Globalfoundries doesn't care "what other semiconductor manufacturers call their processes". But this is obviously false. Globalfoundries cares and it cares a lot of. That is why they choose the marketing name "7nm" for a process node is very very far from a true 7nm node.

 


I will say it one last time, but you are using words that Patton wasn't quoted as saying. There isn't any paraphrasing either or there would be "" and a source listed. You are interpreting this all on your own, and dismissing my words of caution here regardless of the subject of the article.



Q7: So it's not a pure optical shrink, so there is a partial optical shrink?

GP: Yes, the middle line and back-end (BEOL) is where we did our tuning.
Click to expand...
Q9: As far as what we've been able to determine, the difference between 14LPP and 12LP is just a difference in going from 9T to 7.5T design, with that tuning. Are there other changes?

GP: Along with the track changes, we also changed the middle and back-end-of-line ground rules.
Click to expand...

I will say this one last time as well. This is confirmation of at least a partial optical shrink that they are calling 12nm even if it is a marketing term there is a minor increase in density tuning or no tuning that doesn't matter their is always tuning. There is no manual stating the rules of what constitutes a new node, and like I said before since 28nm they have all been marketing nodes ever since.

Q6: So was 12LP originally called 14+?

GP: No, and we never really had a 14+ per se. We have had what we call BKM, which relates to ‘performance bump’ improvements. I think some companies would call it a plus, you would call it a plus.
Click to expand...

Patton has no control over what other companies call the process, and states that he thinks some companies would call it 14+, and even Ian Cutress would call it a plus. This is directly talking about the 2400G and 2200G, Prior called 14+, which as I said before is already released, and show minor improvement to voltage with no better overclocking than 14nm on the top end. So, we can confirm this was a minor change even though it's named 2000 series having Precision Boost 2 in common with upcoming 12nm parts. As for marketing naming schemes I've already stated they have not been accurate since 28nm for any foundry, and most involved in the semiconductor news has known this for a number of years now.

Bottom line is, there are 3 products all different from each other, and you are miss quoting Patton while making inferences about what he is saying from 3rd party statements. I will leave it at that.
 


[Inset comment about lack of improvement by Intel]

[Insert rebuttal and explanation of the limits of threading]

[Insert uninformed opinion about how threading is the future of all things]

[Insert comment about lack of improvement by Intel]

/thread /sarcasm. 😛
 


"uninformed opinion"... All high and mighty today, aren't we, gamerk?

In any case, that 4% uplift only by fixing/improving stuff around cache (what else was there? speed thingy?) is really good and respectable.

Cheers!
 
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