"The fact that AMD does not have this process right now might mean that IBM has not transferred a robust process to AMD or they are not sharing it yet.." (highK/metal gate)
IBM is now on record as saying they will not move to high K until 32nm for logic products, thus it would appear unlikely AMD would do so earlier (unless 32nm was way late and they had no choice). Despite AMD's claim, this is not a simple "drop-in" - there is new tooling involved, other process steps are impacted and would need to be re-tuned, products would need to re-certified (the gate oxide failure modes are different for HighK vs conventional SiON), and in all likelihood the CPU's would need to be re-layed out - meaning new mask sets and potentially a couple of steppings to debug.
As for the ultra low K, the press on this is just as misleading. AMD conveniently claims a 15% wiring delay improvement, which is completely true! Butttttttt, this will not translate to an overall 15% speed improvement as they are still limited by transistor switching speed! Hence you conveniently see no actual claim of overall speed improvement and you hear "enable greater processor performance".... well it is only enabling it if you also speed up the transistor (though this little factoid is conveniently omitted). If nothing is done to the transistor at the the time the magic ultra low K process is implemented you will see very little actual overall improvement - what will happen is you will get electrons to and from the transistor faster but you'll still be spending the majority of the time waiting for the transistor to switch on and off.
Hence the clever choice of words on all these press releases - everything is technically accurate and many people are completely misinterpreting it. Not truly AMD's fault, but they are somewhat complicit as they create these vague press releases and appear to be attempting to capitalize/prey on people's lack of technical understanding. If they wanted to they make these press releases a lot more direct.