News Chinese Researchers UsedAI to Design Industrial-Scale RISC-V CPU in Under 5 Hours

[Admin]

A wholly AI-designed RISC-V CPU was created from scratch in five hours and booted Linux, performing on par with an i486.

Chinese Researchers UsedAI to Design Industrial-Scale RISC-V CPU in Under 5 Hours : Read more

 

[Deleted member 2731765]

Interesting to know that they used a new AI approach to design RISC-V CPU automatically, by generating the Boolean function/logic circuit represented by BSD, which can also automatically generate optimal instruction-level parallelism. Much better than the conventional BDD generation problems tackled in existing EDA tools.

Because using "conventional" and traditional AI learning techniques usually fail if they are used to design CPUs, just basically only from using input-output.

They can only generate correct circuit logic around about 300 logic gates, which is no match when compared to that of latest industrial CPUs. Even the Intel 80486 CPU rounds up to about 300,000 logic gates.

It appears the CPU has been codenamed as "Qimeng 1" (after translation), and 4 million logic gates were generated in 5 hours, which is 4000 times larger than the chip that can be designed by GPT-4.

Not directly related to this news:

View: https://www.youtube.com/watch?v=yTMRGERZrQE&ab_channel=TechTechPotato%3AClips%27n%27Chips

 

[Steve Nord_]

Yeah! It got fabbed! You know it's missing something basic to the what, Athlon IIs and Pentium Core 3s, to not hit 3 GHz at 65 nm, maybe overall metal layers maybe data from that first successful mask gen, but they ran the mini gauntlet and made deadline for the run!

Maybe even a readable outing on arXiv, thanks Chinese Research Team! (Will it have more than one conditional branch? Very very speculative execution? Represent everything in 4s complement? Discover content-addressable memory on its own for network to-do? Generate and throw trash, exceptions, flags or tightly scoped codepages at threads reaching out of scope?)

Whoa, it's short! Separate methods section barely deals with the fab constraints. Notably their AI is reinforcement learning for an adder and a few Boolean theorems (couched in terms of oracles.) So BSD is their own invention rather than Haight-Ashbury.ait.ac.cn and a Binary Speculation Diagram graph. Humble bragging rights to casting with that operation space. Can this be a 1034-bit adder?

 

[JamesJones44]

I would be curious to know how much time it took to gather the data and train the model for the overall time calculation. I'm guessing those parts took longer than 5 hours.

 

[TechyIT223]

What's the success rate of this method?

 

[Deleted member 2731765]

What's the success rate of this method?

Hard to confirm, since this is just an early proof of concept/experimental kind of thing.

But they suggested that performance could still be improved with augmented algorithms, and in the paper's conclusion, team also speculates on a self-evolving machine that can design its own iterative upgrades and improvements.

While that may be a bit far off in the future, the AI did independently discover the 'von Nuemann architecture' through its observation of inputs and outputs.

This means there is room for improvement, and the algorithm can be tweaked to focus on fine-grain architecture optimization to work around traditional bottlenecks, a task which will be quite difficult for human engineers to accomplish.

 

[Sippincider]

It is claimed this AI-automated feat was about 1000x faster than a human team could have finished a comparable CPU design. However, some may poke fun at the resulting AI-designed CPU performing approximately on par with an i486.

I wouldn't poke fun too quickly. What happens when we give AI that same 5,000 hours, and it produces a chip which blows everything out of the water and we humans have no idea how it works?

 

[gg83]

Interesting to know that they used a new AI approach to design RISC-V CPU automatically, by generating the Boolean function/logic circuit represented by BSD, which can also automatically generate optimal instruction-level parallelism. Much better than the conventional BDD generation problems tackled in existing EDA tools.

Because using "conventional" and traditional AI learning techniques usually fail if they are used to design CPUs, just basically only from using input-output.

They can only generate correct circuit logic around about 300 logic gates, which is no match when compared to that of latest industrial CPUs. Even the Intel 80486 CPU rounds up to about 300,000 logic gates.

It appears the CPU has been codenamed as "Qimeng 1" (after translation), and 4 million logic gates were generated in 5 hours, which is 4000 times larger than the chip that can be designed by GPT-4.

Not directly related to this news:

View: https://www.youtube.com/watch?v=yTMRGERZrQE&ab_channel=TechTechPotato%3AClips%27n%27Chips

I'd buy into whatever Jim Keller is selling. That guy is awesome.

 

[shoddyyMic1]

I'd buy into whatever Jim Keller is selling. That guy is awesome.

Yeah too bad he is not much involved these days in chip design projects. Right now I suppose he is focusing more on AI and stuff like that. Tenstorrent more like?

 

[Deleted member 2731765]

Yeah, Jim Keller joined AI chip startup Tenstorrent as CTO in Dec 2020, but became its CEO in January 2023.

 

[TechyIT223]

Hard to confirm, since this is just an early proof of concept/experimental kind of thing.

But they suggested that performance could still be improved with augmented algorithms, and in the paper's conclusion, team also speculates on a self-evolving machine that can design its own iterative upgrades and improvements.

While that may be a bit far off in the future, the AI did independently discover the 'von Nuemann architecture' through its observation of inputs and outputs.

This means there is room for improvement, and the algorithm can be tweaked to focus on fine-grain architecture optimization to work around traditional bottlenecks, a task which will be quite difficult for human engineers to accomplish.

Thanks that makes sense 🙂 I would like to see more implementation of this AI for chip designing in near future

 

[TechyIT223]

Yeah too bad he is not much involved these days in chip design projects. Right now I suppose he is focusing more on AI and stuff like that. Tenstorrent more like?

Chip designing is a complex process though. Jim already devoted a lot of insight and ideas on this tech. Why did they shift their focus on AI is still not clear

 

[shoddyyMic1]

Why would a chip designer go the AI route? I guess AI is becoming the next big thing these days. Hype much.

 

[bit_user]

Yeah too bad he is not much involved these days in chip design projects. Right now I suppose he is focusing more on AI and stuff like that. Tenstorrent more like?

Tenstorrent is now designing and selling RISC-V cores, in addition to their AI chips/chiplets. I think Jim just couldn't stay away from classical CPU design.

Tenstorrent Shares Roadmap of Ultra-High-Performance RISC-V CPUs and AI Accelerators

Addressing AI and HPC needs with the RISC-V instruction set architecture.

www.tomshardware.com

 

[bit_user]

Why did they shift their focus on AI is still not clear

Tenstorrent was founded as an AI company. I think Jim went there because he wanted another job after he left Intel and had some AI experience from his time at Tesla.

Another take: if you want to get your startup funded, you've got to go where the money is at.

IMO, what's really interesting is their recent pivot towards RISC-V cores. I can't tell if this was done as a hedge, in case they fail to achieve a foothold in the AI market, or more as a pet project of Jim's. Perhaps a bit of both.

 

[Deleted member 2731765]

Tenstorrent recently licensed both its Tensix AI accelerator core IP and its Ascalon CPU core IP to LG Electronics. I guess LG will use the Tensix IP at the embedded edge, in smart TVs and automotive chips.

View: https://www.youtube.com/watch?v=_MrGNlXRi9M&t=1s&ab_channel=EETimes

 

[TechyIT223]

Tenstorrent was founded as an AI company. I think Jim went there because he wanted another job after he left Intel and had some AI experience from his time at Tesla.

Another take: if you want to get your startup funded, you've got to go where the money is at.

IMO, what's really interesting is their recent pivot towards RISC-V cores. I can't tell if this was done as a hedge, in case they fail to achieve a foothold in the AI market, or more as a pet project of Jim's. Perhaps a bit of both.

Yeah that makes sense