Well, Scientia might be around here lurking, but the article he posted on his blog is kind of interesting to say the least. I think its a good read and a good way to exercise our powers of deduction and reasoning. with that said, please reply thoughtfully to the thread and leave the bashing out.
Although Core 2 Duo has been impressive since its introduction last year, a veil of secrecy has remained in place which has prevented a true understanding of the chip's capabilities. This has been reminiscent of The Wizard Of Oz with analysts and enthusiasts insisting we ignore what's behind the curtain. However, we can now see that some of C2D's prowess is just as imaginary as the giant flaming wizard.
The two things that Intel would rather you not know about Core 2 Duo are that it has been tweaked for benchmarks rather than for real code, and that at 2.93 Ghz it is exceeding its thermal limits on the 65nm process. I'm sure both of these things will come as a surprise to many but the evidence is at Tom's Hardware Guide, Xbitlabs, and Anandtech. But, although the information is very clear, no one has previously called any attention to it. Core 2 Duo roughly doubles the SSE performance of K8, Core Duo, and P4D. This is no minor accomplishment and Intel deserves every bit of credit for this. For SSE intensive applications, C2D is a grand slam home run. However, the great majority of consumer applications are more dependent on integer performance than floating point performance and this is where the smoke and mirrors have been in full force. There is no doubt that Core 2 Duo is faster than K8 at the same clock. The problem has been in finding out how much faster. Estimates have ranged from 5% to 40% faster. Unfortunately, most of the hardware review sites have shown no desire to narrow this range.
read the rest:
http://scientiasblog.blogspot.com/
© Scientia from AMDZone, April 15 2007
Comments?
Edited to save my ass from a copyright violation charge.
Ninja
I had to read that article several times since you requested no bashing. I kept coming to the same conclusion, so, sorry but I find it difficult not to bash. While I respect Sceintia as the least narrowminded, most logical and practical of the AMD fanboys/horde, the article is, in a word bizzare. Another word would be skewed. Yet another would be delusional.
First I will refer to Scientia as "it", since there has been an unverified rumor floating around that it is a female, and I wouldnt want to insult it
It starts the article claiming Intel has been misleading, that C2D is optimized to run benchmarks, not code. Aside from the fact that nowhere in the article did it present actual evidence to support that claim, I can help but wonder if Scientia realizes that benchmarks are in fact themselves code, albeit worthless code since they dont accomplish work. Rather, what it does is 'lightly' slam benchmarks for not testing in the manner which it sees fit, specifically overloading cache. Then, it gives a comparison of C2D cache to K8 cache, and explains why the K8s method of cache implementation is better.
Frankly, it just looks like another version of the pre-C2D release 'cashe thrashing' argument that the likes of MrsBytch(then known as MadModMike), 9-inch and so many other horde acolytes ran around crying about. Cache Thrashing, as you know, was disproven only moments after C2Ds release, if not before.
To futher support its claims, it actually uses factual data (benchs of the C400) as if to prove that the cache is where C2D gets its performance. Well Duh! That Intel vastly improved the prefetchers, ram and cache handling(memory handling) is not now, nor has been a secret for sometime, except perhaps to those who were only interested in reading AMD articles. So obviously reduction in cache would incur a perfromance hit. However, what Scientia does not note, IRT cache and cashe thrashing, is the peak. Weve all seen the tests that the jump from 2mb to 4mb cache helps C2D, but not nearly so much as one would expect. The extra cache exceeds the point of diminishing returns, which is interesting, since it esentially limits the possibility of the cache thrashing argument to a point below the low end C2Ds 2mb of cache. The 2mb resevoir is obviously enough since significantly more brings minimal gains, with no unusuall difficulties noted. Now if Scientia wanted to argue that the C400 was lacking sufficient cache, or suffers from performance problems due to a lack of cache, that would have been a legitimate argument, but to reverse that argument to imply that the shortage of that commodity, which is so vital to C2Ds performance, implies a problem with the Uarch itself is simply deviuos or ignorant.
Esentially, his entire aurgument in that paragraph is akin to someone saying, 'dont buy a GM V8, beacuse their economy 4 cylinders have been shown to lack power' :roll:
IRT the 2.93 GHz limit @65nm, it again provides no/tainted proof. Scientia starts by refering to the Thermal Guide in our own forum, which it fails to correctly identify. It then mixes this with data form Anandtech. Why this is interesting as while the guide defines 55'C as the TCase max, Intel itself defines TCase max(thermal specification at Max Thermal Design Power(TDP)) @ as 60.4'C
EE6800 specs
He bases his conclusion on the data for the stock cooler, which while not even remotely a poor way to judge the results clearly puts the burden of the test on the cooler itself, not the process. To say 2.93Ghz is the max clockspeed the process can safely attain because the stock HSF can only maintain TCase max under 100% load at that clockspeed is purely and simply assinine. It is a test of the HSF, not the Uarch. Technically, based on his presentation, the only real way to test that would be to run the CPU without any additonal form of cooling, including the heat spreader. In which case, not only would the C2D fail to meet its Tcasemax @ load, but any other recent processor (post 2000) would as well, either Intel or AMD produced!
Further Scientia fails claims that anything faster than 2.93Ghz is dangerous because of the heat, yet it fails to note that (in the case of the 6800) the TCase max of 60.4'C is when the thermal monitor activates, protecting the CPU from thermal overload.
I am very disapointed in Scientia....I respected it as a logical person, but this review is blatently tainted in 'Intel lies, AMD rulz'.