-Fran- :
Back to the 40% statement. I would imagine is under a regular floating point operation metric, probably using AVX1. If they are talking Integer performance, then AMD is gonna be screwed again in the consumer market.
XV core: 2ALU + 2AGU
Zen core: 4ALU + 2AGU
Thus Zen core can do up to 2x more integer instructions per cycle. However, this is a peak, because integer workloads are not unending sequences of integer instructions. Assuming on a typical integer x86 workload about one half of total instructions are loads and stores whereas remaining half are branches and integer/logic operations, we can do the next rough estimation:
XV core: 4 * 50 = 200
Zen core: 6 * 50 = 300
This implies Zen could be up to 50% faster clock-for-clock on integer workloads. But of course, this rough computation assumes that rest of microarchitecture was scaled up conveniently, including the cache subsystem. It could be that the microarchitecture was scaled-up for sustaining loads to 3ALUs and that the fourth ALU was added by reasons of symmetry. In that case the improvement over Excavator would be more in the 30% range.