hyperthreading

[mirzasila]

can anyone explain to me why there is a two interrupt controllers on the intel pentium IV with HT technology
if you have some usefull links....
sorry for my poor english

 

[Xeon]

Its used for thread manipulation.

Xeon

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[mirzasila]

is there some detailed explanation, I need it for seminar

 

[Flinx]

The "interrupt controller" thing:

<A HREF="http://www.osnews.com/story.php?news_id=3023" target="_new">http://www.osnews.com/story.php?news_id=3023</A>


<A HREF="http://service.steinberg.net/knowledge_pro.nsf/0/67e18c406ce0356fc1256ab5003b6491?OpenDocument" target="_new">http://service.steinberg.net/knowledge_pro.nsf/0/67e18c406ce0356fc1256ab5003b6491?OpenDocument</A>

maybe somethign of interest in here (about the middle and below)
<A HREF="http://www.xbitlabs.com/forum/viewtopic.php?t=3205" target="_new">http://www.xbitlabs.com/forum/viewtopic.php?t=3205</A>

u have to dig out of here.. might help
<A HREF="http://support.packardbell.com/se/mypc/?PibItemNr=spec_chipset_ICH4M" target="_new">http://support.packardbell.com/se/mypc/?PibItemNr=spec_chipset_ICH4M</A>

intel integration overview
<A HREF="http://www.intel.com/support/processors/pentium4/sb/CS-017371.htm" target="_new">http://www.intel.com/support/processors/pentium4/sb/CS-017371.htm</A>

Something in Toms
<A HREF="http://www.tomshardware.com/cpu/20021202/hyperthreading-02.html" target="_new">http://www.tomshardware.com/cpu/20021202/hyperthreading-02.html</A>

The loving are the daring!