There is so much negative misinformation and click bait floating around about Intel it's dizzying. FACTS: 1)Intel prior CEO prepaid for TSMC N3 capacity.
I've seen this claim, but since you're claiming it's a
fact, you should be able to provide a good source on it.
This is the main reason Intel is using TSMC for LUnar Lake
During a Q&A session, I think at a Lunar Lake launch event, the question was asked why Intel used TSMC for the compute tile (whereas they'd previously used the Intel 4 node for Meteor Lake's compute tile). The answer was that the designers were given the choice of what node to use and TSMC's N3 node was the best available option, at the time. So, you're directly contradicting Intel on this.
Then why did Intel publicly announce that Arrow Lake would use 20A, if they had planned to use TSMC, all along?
Intel 20A never had plans to be in widespread use. It is/was a stepping stone learning node.
That's different than their research nodes, which it sounds like you're trying to claim it was. For instance, Intel made a research node to test out backside power delivery, based on Intel 3, and used it to fab a Crestmont core. That weird hybrid node was never previously announced. It didn't show up on their roadmap and they only mentioned it after the fact.
18A by all accounts, except one, is doing just fine. Pat even gave some defect/yield numbers recently and those were healthy. 18A is in chips now booting up and running windows.
All of these things were said about Intel 4 and Meteor Lake, yet Meteor Lake-S (i.e. the desktop product) ended up getting cancelled and Meteor Lake has been fairly unprofitable for Intel, due to relatively poor yields on the Intel 4 compute tile. I no longer trust what Intel says about their nodes.
Let's not forget, that 18A has backside power, something dreamed about for over a decade and Intel seems to have this nailed.
Yeah, probably first seen on an IMEC fab technology roadmap. That's where a lot of these ideas originate - not from Intel, TSMC, or Samsung. I think it's probably necessary to have someone doing such long-range technology development, so that ASML and other partner companies know what sorts of capabilities future machines need to have.
TSMC N2 will not have backside power.
Presumably, it'll have other features that make up at least
some of the difference.
Intel is the one and only company that has so far purchased, installed, and started R&D with an ASML high NA EUV lithograhpy tool.
TSMC has raised cost-related questions around high-NA and has their own roadmap that pursues improvements elsewhere. In my mind, it's not a given that high-NA will confer an unassailable advantage, just like I'm not sure about backside power delivery.
Even if Intel really does pull off a coup and surpass TSMC on key parameters, that's not the end of the story. We have yet to see how Turin (Zen 5-based EPYC) will measure up against Xeon 6, which supposedly will have a node advantage for at least the P-core version.
Intel is doing just fine.
No, they're objectively not. You believe Intel
will do just fine, but such predictions have been wrong before. Don't count your chickens before they hatch.
Why all the negativity for Intel. Why do people seem happy about the possibility of Intel failing?
I'm just trying to be realistic. I think Intel has made misleading statements and not been forthcoming with negative information, on numerous occasions under Pat. I am now very skeptical and no longer willing to take their word for anything. From here on out, they're going to prove it to me, first.
And no, I do not want Intel to fail. Not any part of it.