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PPL making comments about nanometer process tech - need to read this.

https://www.techpowerup.com/272489/...-7-nm-node-using-scanning-electron-microscope

"The results? Well, the Intel 14 nm chip features transistors with a gate width of 24 nm, while the AMD/TSMC 7 nm one has a gate width of 22 nm (gate height is also rather similar). "

"Another interesting thing to note here, the gate width is not following the naming scheme as you might have expected. The 14 nm transistor isn't 14 nm in width, and the 7 nm transistor isn't 7 nm wide. The naming of the node and actual size of the node have had a departure a long time ago, and the naming convention is really up to the manufacturer - it's become more of a marketing gimmick than anything else. "

People quoting that techpowerup article needs to be reading this instead.
 
People quoting that techpowerup article needs to be reading this instead.
But your article says the exact same thing?!
Intel’s 14nm process was significantly denser than Samsung or TSMC’s 14nm/16nm processes.
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the Intel 10nm process was slightly denser that TSMC or Samsung, but in 2018 TSMC’s 7+ process (half node) and in 2019 Samsung’s 6nm (half node) processes passed Intel 10nm density
The nm was just a gadget anyway and will become even more so the smaller they will get because making a gate that is really that small is impossible so they are making one feature that small and call the whole gate that.
 
But your article says the exact same thing?!

The nm was just a gadget anyway and will become even more so the smaller they will get because making a gate that is really that small is impossible so they are making one feature that small and call the whole gate that.
The context is very different (and a lot more informative).

The Techpowerup article is frequently quoted by Intel apologists who claim "Intel 14nm is almost as good as TSMC 7nm!!", and that's far from the truth:

In 2017 TSMC released their 7nm process moving further ahead of Intel and in 2018 Samsung released their 7nm process also moving further ahead of Intel. In 2019 Intel finally started shipping 10nm and the Intel 10nm process was slightly denser that TSMC or Samsung, but in 2018 TSMC’s 7+ process (half node) and in 2019 Samsung’s 6nm (half node) processes passed Intel 10nm density

Even if Intel released 10nm desktop parts today they still wouldn't be on even footing with TSMC 7+.

There's a much much more indepth article on what all the numbers in processes mean, but ultimately what counts most is transistor density, and Intel is behind.
 
The context is very different (and a lot more informative).

The Techpowerup article is frequently quoted by Intel apologists who claim "Intel 14nm is almost as good as TSMC 7nm!!", and that's far from the truth:



Even if Intel released 10nm desktop parts today they still wouldn't be on even footing with TSMC 7+.

There's a much much more indepth article on what all the numbers in processes mean, but ultimately what counts most is transistor density, and Intel is behind.
Half-information from everywhere, and I don't even mean you, reviews should be telling us this stuff.
TSMC has two versions, High performance and High Density.
That's 65 Million transistors for HP and 91 for HD instead of the 101 that your article states for the 7nm node.
https://en.wikichip.org/wiki/7_nm_lithography_process#Std_Cells
Qualcomm reported that on its own SoC (Snapdragon 855), the high-performance cells deliver around 10-13% higher effective drive current (Ieff), albeit at the cost of being slightly leakier transistors. Based on WikiChip's own analysis, the dense cells come at around 91.2 MTr/mm² while the less dense, high-performance cells, are calculated at around 65 MTr/mm².