L2 Speed

All the L2 cache on the P2's and P3 Katmai's run at half the clock. That's just the way it is.

"We are Microsoft, resistance is futile." - Bill Gates, 2015.
 
This is becasue Slot 1 Pentium 2's and Slot 1 Katmai based Pentium 3's use 2 External L2 cache chips.....they cannot handle thr same speed as the core clock as they r not part of the core...now r they produced by the CPU manufacturer (Intel in this case) therefore setting it up to do so would be hell/not worth it....and eben if they did, it would still be slower than on-die cache..just because it is off-die....and BTW no, do not change this settings as u WILL get stability problems.....and as far as i know..Slot A AMD Athlon's r the only chips where u can use a program to change the speed of the L2 Cache...as they, also had external L2 cache chips ont he PCB board...but were of MUCH better/newer design than that of Slot 1 Katmai based P3's...

<A HREF="http://www.anandtech.com/mysystemrig.html?id=13597" target="_new">-MeTaL RoCkEr</A>
 
What the other guys said. Remember the 486's and Pentiums that had the cache on the motherboard? Their L2 cache only ran at bus speed! That meant and AMD K6-2 400 only had 1/6 speed cache. At that time, manufacturers had problems producing on die cache-resulting in a lot of bad CPU's when they attempted it. That's why Intel released the Slot 1 package, so they could run the cache at a rate FASTER than the bus speed but still off die. They bought their cache from memory manufacturers, most of it was 3ns or slower. So they ran it at half of CPU speed.

Now the slot card added cost to the PII, but off die cache reduced the number of bad cores, so it paid off. But when Intel got to the point that they could produce on-die cache reliably, they no longer needed the slot card. That's why they went back to sockets.

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Hmm I doubt off-die cache could possibly run at 3ns. Even today's L2 on-die is nowhere near 3ns, but rather 7-10.

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I've had the covers off. Besides, do the math, at half speed, you need the cache to be that fast. I've seen everything from 5.5 to 3.3ns on these chips..(pulls out a broken PIII 600 Katmai Matisario sent him), yep, 3.3ns. 3.3ns supports up to 300MHz, which is half of 600MHz, makes sense.

In fact TOM did an article on overclocking a certain PII revision that had 3.5ns cache, it was a 300 with HUGE overclockability!

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So why do new caches have more latency yet with such a huge clock speed as the CPU's?

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