this is from a past post (crashman i think)
in your case its 2,2,2 so that means A,B,C
"Memory timings = A,B,C,D
A= tCAS = Time Delay (t) Column Access Strobe (CAS) (Pulse Duration in cycles)
B = tRCD = Time Delay (t) RAS Active to CAS Active
C = tRP = Time Delay (t) RAS Precharge
D = tRAS = Row Access Strobe (Pulse Duration in cycles)
The first latency, tCAS, is time delay specified before the memory controller will send out the next instruction. It is the wait time for the CAS pulse signal to finish. If it or any other delay is too short there will be corrupted output data at the end of the read.
tRCD is the delay between the cycle sets.
tRP is the charge given to refersh/deactivate the row.
tRAS is the total active to de-activate time."
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