Nvidia Announces The GTX Titan X; Features Maxwell, 8-Billion Transistors

[Mike Coberly]

Looks like I'll be sticking with the Red Team once again (AMD has always been the working-man's GPU manufacturer). Looking back at Nvidia's other hardware launches; this thing is gonna cost you an arm and a leg, and quite possibly your first born child.

"It also features a jaw-dropping 12 GB frame buffer -- impressive for a single-GPU graphics card."

I'd like to quietly point out that Nvidia's Quadro K6000 (a workstation card, yes. Released in the fall of 2013) already has 12GB of RAM, as does their Tesla K40 compute card. 12GB may seem large in the 'prosumer' arena; but it's nothing new in terms of what's been done before.

 

[ohim]

"Inspired by gamers, build by nvidia" When did the gamers asked for an overpriced ovepriced card like this ? (Yes, 2 times overpriced)

 

[Memnarchon]

1st gen HBM is limited to 4GB VRAM. So since it has 12GB VRAM, I doubt its gonna have HBM...

That and it's already known that Nvidia will be sticking with GDDR5 for Maxwell.

And HBM is currently limited to 4GB only on the rumored 4096-bit interface on the 390X. Of course there are other ways to achieve greater capacities, but it'll cost you.

I was talking about 1st gen HBM that will be available soon.
At the moment there are no known ways to achieve greater capacities unless you are talking about 2nd gen of HBM (or you know something more that the media don't know 😛).
HBM overall speccs

You could widen the interface, which is what I was referring to.

Nope. As I said the maximum limit of 1st gen HBM is 4096bit. We will not see 2nd gen HBM soon.
Unless with interface, you are not talking about "memory interface".

 

[Ninjawithagun]

@ doomtomb...the Titan X would cost you a month's salary?? What kind of crappy job do you have? hahahahaha

 

[Murissokah]

Im waiting for 10 billion transistors. Guaranteed to cost you a month's salary.

Hah, I actually wish this were true where I live. The Titan Z costs more than a year of minimum wage here. And that's considering gross income, if you factor in the absurd taxes we have to pay you will have to choose between your wife and kids or the card.

 

[Undying89]

12GB Vram on 384bit bus? What a bottleneck, lol. It wont use half of that memory anyway...

 

[Avus]

I really hope video card manufacturers can "standardized" the video card PCB form factor so 3rd party cooling solution can be standardize too. Because in my opinion, GPU need 3rd party cooling solutions MUCH MORE than CPU.

 

[TNT27]

if its "50"$ i just might buy it.

 

[ThePsycho Supaman]

I hope it's no too much more then a thousand bucks!

 

[ThePsycho Supaman]

I hope it's no too much more then $1000. If not I'm already sold.

 

[spartanmk2]

8 BILLION Transistors, Dr. Evil /pinky.

 

[dragonsqrrl]

1st gen HBM is limited to 4GB VRAM. So since it has 12GB VRAM, I doubt its gonna have HBM...

That and it's already known that Nvidia will be sticking with GDDR5 for Maxwell.

And HBM is currently limited to 4GB only on the rumored 4096-bit interface on the 390X. Of course there are other ways to achieve greater capacities, but it'll cost you.

I was talking about 1st gen HBM that will be available soon.
At the moment there are no known ways to achieve greater capacities unless you are talking about 2nd gen of HBM (or you know something more that the media don't know 😛).
HBM overall speccs

You could widen the interface, which is what I was referring to.

Nope. As I said the maximum limit of 1st gen HBM is 4096bit. We will not see 2nd gen HBM soon.
Unless with interface, you are not talking about "memory interface".

You keep referencing that image, but where does it suggest a 4096-bit limit to interface width with 1st gen HBM? The only limitations it points to are stack height and density per die, which is in line with what's been published elsewhere.

 

[littleleo]

Cool now all the AMD Fanboys can say this is just a distraction from the GTX 970 issue, and it cost to much and it's a rip off for customers. And of course the new fabled AMD 390XXX is better, with a smaller core, it's faster, it's cooler, it's cheaper, and cooks you breakfast and washes your car too. lol!

 

[WyomingKnott]

8 BILLION Transistors, Dr. Evil /pinky.

I feel sorry for the employee who had to take a magnifier to the masks and count all those transistors.

Spoiler

Yes, I know that the masks were laid out by software, and the software can keep track of the transistor count, and also display them large enough to be seen without a magnifier. I was just being silly.

 

[littleleo]

I don't know how do we know it's really 8 Billion and not 7.5 Billion, huh?

 

[Memnarchon]

Nope. As I said the maximum limit of 1st gen HBM is 4096bit. We will not see 2nd gen HBM soon.
Unless with interface, you are not talking about "memory interface".

You keep referencing that image, but where does it suggest a 4096-bit limit to interface width with 1st gen HBM? The only limitations it points to are stack height and density per die, which is in line with what's been published elsewhere.

My bad. I should explained it a bit.

HBM1, as seen in the picture directly from Hynix, uses 4hi stacks(4 chips max) 1GB(256MB) chips, 1GB stacks with 128GB/s @ 1Ghz.
So 4 stacks can give 4GB at 512GB/s @1Ghz. We can safely assume that AMD will use HBM1 4GB with 1,2Ghz, in order to reach 640GB/s.
I think that we might see later, when it will be possible, 390X 8GB versions with HBM2.
edit: Now that I thought more about it, you might don't know how the memory interface is calculated.
For HBM only* = bandwidth / clock = 512GB/s / 1Ghz = 4,096,000,000,000(bits) / 1,000,000,000(hz) = 4096bit.
*GDDR5 has more factors due to QDR.
edit2: To mods: I know that Hynix requested from major PC Hardware sites to remove these images. If this violates this agreement feel free to delete the image or ask me to delete it myself.

 

[WyomingKnott]

I don't know how do we know it's really 8 Billion and not 7.5 Billion, huh?

I just got that. Brilliant.

 

[dragonsqrrl]

Nope. As I said the maximum limit of 1st gen HBM is 4096bit. We will not see 2nd gen HBM soon.
Unless with interface, you are not talking about "memory interface".

You keep referencing that image, but where does it suggest a 4096-bit limit to interface width with 1st gen HBM? The only limitations it points to are stack height and density per die, which is in line with what's been published elsewhere.

My bad. I should explained it a bit.

HBM1, as seen in the picture directly from Hynix, uses 4hi stacks(4 chips max) 1GB(256MB) chips, 1GB stacks with 128GB/s @ 1Ghz.
So 4 stacks can give 4GB at 512GB/s @1Ghz. We can safely assume that AMD will use HBM1 4GB with 1,2Ghz, in order to reach 640GB/s.
I think that we might see later, when it will be possible, 390X 8GB versions with HBM2.
edit: Now that I thought more about it, you might don't know how the memory interface is calculated.
For HBM only* = bandwidth / clock = 512GB/s / 1Ghz = 4,096,000,000,000(bits) / 1,000,000,000(hz) = 4096bit.
*GDDR5 has more factors due to QDR.
edit2: To mods: I know that Hynix requested from major PC Hardware sites to remove these images. If this violates this agreement feel free to delete the image or ask me to delete it myself.

...Okay, you've done a great job explaining how HBM works at a high level, but you seem to be having difficulty addressing the question at hand, which is why you think 1st gen HBM is limited to 4GB (or a 4096-bit interface), or more specifically what about this particular image leads you to believe that. And I can't really blame you, because there's nothing on that image that describes a 4GB or 4096-bit limitation to HBM 1. You seem to be extrapolating information that is on the image (like each 4-hi stack having a 1024-bit interface) and concluding for no apparent reason that 4 of these stacked modules is the limit. I don't know if this is influenced by rumors you've read elsewhere, but all I know is that rumors suggesting a 4GB limit were debunked a while ago by both Hynix and AMD. Even some of AMD's own slides have shown examples of up to 8 modules on the same interposer.

Now I'm not arguing with you that the the 390X won't be limited to 4GB with 1st gen HBM if it has a 4096-bit interface, I never argued that. In fact I said in my original comment: "HBM is currently limited to 4GB only on the rumored 4096-bit interface on the 390X". But from a purely hypothetical standpoint there's no reason you couldn't build a 6144 or a 8192-bit interface with 1st gen HBM using 6 or 8 modules. You could definitely argue that there's no application for such an interface at the moment, and that it would add unnecessary cost and complexity, which is why I also said in my original comment: "but it'll cost you", but that's totally different from saying there's a hard limit for some architectural reason.

 

[Memnarchon]

...Okay, you've done a great job explaining how HBM works at a high level, but you seem to be having difficulty addressing the question at hand, which is why you think 1st gen HBM is limited to 4GB (or a 4096-bit interface), or more specifically what about this particular image leads you to believe that. And I can't really blame you, because there's nothing on that image that describes a 4GB or 4096-bit limitation to HBM 1. You seem to be extrapolating information that is on the image (like each 4-hi stack having a 1024-bit interface) and concluding for no apparent reason that 4 of these stacked modules is the limit. I don't know if this is influenced by rumors you've read elsewhere, but all I know is that rumors suggesting a 4GB limit were debunked a while ago by both Hynix and AMD. Even some of AMD's own slides have shown examples of up to 8 modules on the same interposer.


Now I'm not arguing with you that the the 390X won't be limited to 4GB with 1st gen HBM if it has a 4096-bit interface, I never argued that. In fact I said in my original comment: "HBM is currently limited to 4GB only on the rumored 4096-bit interface on the 390X". But from a purely hypothetical standpoint there's no reason you couldn't build a 6144 or a 8192-bit interface with 1st gen HBM using 6 or 8 modules. You could definitely argue that there's no application for such an interface at the moment, and that it would add unnecessary cost and complexity, which is why I also said in my original comment: "but it'll cost you", but that's totally different from saying there's a hard limit for some architectural reason.

Excuse me but this image comes directly from hynix's 30pages pdf about HBM that was removed from sites by hynix's request. Of course they would deny it...
Well it seems that our arguement is that you believe that HBM1 can go more than 4GB and 4096bit.
What I believe is that Hynix call this HBM2 (more than 4GB and up to 8192bit) as we can see it in their files.

 

[dragonsqrrl]

...Okay, you've done a great job explaining how HBM works at a high level, but you seem to be having difficulty addressing the question at hand, which is why you think 1st gen HBM is limited to 4GB (or a 4096-bit interface), or more specifically what about this particular image leads you to believe that. And I can't really blame you, because there's nothing on that image that describes a 4GB or 4096-bit limitation to HBM 1. You seem to be extrapolating information that is on the image (like each 4-hi stack having a 1024-bit interface) and concluding for no apparent reason that 4 of these stacked modules is the limit. I don't know if this is influenced by rumors you've read elsewhere, but all I know is that rumors suggesting a 4GB limit were debunked a while ago by both Hynix and AMD. Even some of AMD's own slides have shown examples of up to 8 modules on the same interposer.


Now I'm not arguing with you that the the 390X won't be limited to 4GB with 1st gen HBM if it has a 4096-bit interface, I never argued that. In fact I said in my original comment: "HBM is currently limited to 4GB only on the rumored 4096-bit interface on the 390X". But from a purely hypothetical standpoint there's no reason you couldn't build a 6144 or a 8192-bit interface with 1st gen HBM using 6 or 8 modules. You could definitely argue that there's no application for such an interface at the moment, and that it would add unnecessary cost and complexity, which is why I also said in my original comment: "but it'll cost you", but that's totally different from saying there's a hard limit for some architectural reason.

Excuse me but this image comes directly from hynix's 30pages pdf about HBM that was removed from sites by hynix's request. Of course they would deny it...
Well it seems that our arguement is that you believe that HBM1 can go more than 4GB and 4096bit.
What I believe is that Hynix call this HBM2 (more than 4GB and up to 8192bit) as we can see it in their files.

Not sure what else to say, you just seem to be locked in a cycle of confirmation bias. I have no doubt that the image is genuine, I never questioned its authenticity. What I'm saying, which I'm sure you'll find a way to either misinterpret or ignore entirely, is that the image does not provide evidence supporting your claim. And when confronted about this issue you either deflect or take offense.

If you're really that convinced that the image you referenced somehow indicates a 4 module limit to 1st gen HBM, despite being unable to explain why that is, then I guess an obvious follow up question would be what on that same image indicates that 2nd gen HBM will remove this limitation? Hint, nothing. Everything in that image describes HBM enhancements on a per module basis. It doesn't say anything about a limited module count with HBM 1 or that the limit will increase with HBM 2.

The difference between what I believe and what you believe is that you can't provide anything substantive to back up your claim, which is all that really matters in this argument.

 

[Memnarchon]

Not sure what else to say, you just seem to be locked in a cycle of confirmation bias. I have no doubt that the image is genuine, I never questioned its authenticity. What I'm saying, which I'm sure you'll find a way to either misinterpret or ignore entirely, is that the image does not provide evidence supporting your claim. And when confronted about this issue you either deflect or take offense.

If you're really that convinced that the image you referenced somehow indicates a 4 module limit to 1st gen HBM, despite being unable to explain why that is, then I guess an obvious follow up question would be what on that same image indicates that 2nd gen HBM will remove this limitation? Hint, nothing. Everything in that image describes HBM enhancements on a per module basis. It doesn't say anything about a limited module count with HBM 1 or that the limit will increase with HBM 2.

The difference between what I believe and what you believe is that you can't provide anything substantive to back up your claim, which is all that really matters in this argument.

Well from the two of us here I was the only one to provide any source or link of evidence.
Although the picture has HBM 4 hi stack chips and it has one of them "zoomed", it doesn't indeed say that is limited to this protoype.
I had read other articles about this so I took this as a fact.
Anyway I believe that in june when 390X will be launched at computex, we will see how much VRAM it will have since we can get almost no info about it atm cause of the NDA.
History will tell who is wrong and who is right...

 

[BobRoberts363]

I would just be happy with a 980ti with 384bit bandwidth and a FULL 4gb ram with 3000 cores. CAN YOU DO IT Nvidia???? No need for something thats gonna cost well over 2k .