On MediaTek's Deca-Core Mobile Chip Strategy

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That's nice, but until MediaTek starts being honest and honouring their licensing obligations instead of parasitising the work of others, I have no interest in that company and I would urge people to boycott them.

Edit: For those of you who may not know, MediaTek does not observe GPL compliance and has a very poor record with the Android development community. Condoning this practice encourages it in others and makes it harder to contribute to a better running platform for all of us. That's why I say this.
 
what's the fabrication process for helio x20 ? afaik the a72 core was optimized for finfet process.

it's a nice idea on paper. but there's gotta be some delay in task switching when the processors are stalled yet sipping power. and if the scheduler (both OS and the CPU) can't keep up, it'll turn the whole event into a power drain instead. e.g. the os sticks a certain process on the high cluster (dual a72 running at 2.2 GHz).
 

ZolaIII

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Big litle with two clusters is stupid but this is super stupid. Even if they made shared coherent L2 Cache (what I doubt) between 3 clusters trade migration would eat possible benefits on small short running tasks. Than again having 4 more cores even running in active idle will certainly consume more power, not to mention all of them shifting tough voltage table. And again 1.4GHz for "slower" small cluster is not really green power limit, 1GHz is. So all of this is super stupid.
Just to mention that Cortex A72 @ 1GHz would approximately use same amount of power vile delivering the same amount of performance as A53 @ 1.4GHz.
Now proper way to do it for now would be with two clusters & adding time based condition lop to scheduler to steady frequency transitions.
Don't get me wrong I do think their is space for let's say two more general purpose cores but micro controller class ones that would do the light tasks vile device is inactive & rest are in a deep sleep state & when switched on they can be used for offloading main ones from peripheral tasks like for instance acting as storage controller. Problem is ARM still didn't done any V8 compactible (64 bit) microcontroller design...
 

Quixit

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There is a reason that all last generation phones picked Qualcomm's Snapdragon 800 over all the big.little configurations. The idea has marginal benefits over a dynamic clock speed, a lot of restrictions and wastes die space. Adding an extra, middle tier is very stupid, when are you even using a middling load load-term? Low performance with spikes of high perfomance at least makes some theoretical sense.

P.S. Relating the power efficiency of CPU cores to automobiles is fallacious and I can't believe you didn't call them out on that.
 

Tibeardius

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This is the simple approach to building a better core. Use 3 groups of cores that are only good for one thing and then switch between them. I'm not saying it won't/doesn't work, but it isn't a very elegant solution. Creating a more flexible core that knows when to power up, power down, idle etc, is what we need. I guess they don't have the money for R&D.
 
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