Various Interesting News From CeBit

[ltcommander_data]

Now that IDF is over, CeBit is obviously the big show.

http://www.anandtech.com/tradeshows/showdoc.aspx?i=2721&p=1

I couldn't help but notice the statement:

Hyperthreading could probably have done more for Woodcrest than it ever could for the Nocona and Irwindale Xeons.

I found this rather funny since when I suggested that the Merom architecture might better support Hyperthreading a long time ago I was shot down rather aggressively.

In any case, Intel is at it again with Itanium. The showed a Madison system which is pretty impressive considering it was a 4 processor dual core setup for 8 cores and able to process up to 16 threads. Each two CPU pair also looks to have a dedicated memory controller. It would probably be pretty good, if only they shipped the blasted thing already. Intel of course pointed to this statement in their defence:

Intel cited an IDC report, which reported that the Itanium already achieves 30% of the revenue of the IBM RISC space, and 48% of Sun’s RISC revenue. Considering that the single threaded “Madison” (1.6 GHz, 3-9 MB L3-cache) is hardly interesting for servers compared to the quad (and much more) threaded IBM Power family, it is quite an achievement. Itanium must be quite a success in the HPC space, a market which is about 6 billion dollars worth.

The major news is from AMD. Looks like guaranteed memory support is only for DDR2 667 at this time.

However, our sources tell us that the available engineering samples of the socket-F Opteron are not capable of working together with DDR-II 800. So right now, boards that were made to support DDR-II 800 cannot be validated.

A new revision, which is expected to be available to the motherboard manufacturers around mid-April, should solve that. With DDR-II 800, only 4 DIMMs per CPU can be used. Once you lower the memory speed to DDR-II 667, you can use all 8 DIMMs per CPU.

It's too bad that DDR2 800 limits the number of DIMMs available, although with higher capacity memory this isn't as much of a problem. On another memory issue, AMD also spent some time bashing Intel's use of FBDIMMs which begs the question of how likely AMD will be using it any time soon.

The launch window of Socket F has also been announced.

All 2xx and 8xx Opterons will make the move to socket-F and registered DDR-2 667 in Q3 of 2006.

That looks to put it after Dempsey and AM2, and right up against Conroe and family.

 

[MadModMike]

1) AMD has the projection for FB-DIMM's on their website for 2007

2) Anand: "AMD does have a point, but conveniently forgets that DDR-II for servers will be ECC buffered and thus will have an address buffer too." - Yeah, I'm sure AMD just "forgot"...

Gotta love the way Anand words things, almost reminds you of other places (hint hint).

Anyways, as I said in another thread, AMD is releasing technologies to help customers with performance and reliability, such as with their RAS tech. AMD will continue to release technologies that implement the best performance and value to the customer.

Anand: "In a more realistic situation, the memory subsystem of the Intel server with 8 to 16 DIMMs will consume about 16 to 48 Watt more than an Opteron based server and not 200 Watt as AMD’s slide seems to indicate." Is this "realistic" situation something made up in lala-land? That appears to be it...I guess Anand can't do basic math...

~~Mad Mod Mike, pimpin' the world 1 rig at a time

 

[apache_lives]

i thought hyperthreading worked on P4 cause of the extra long pipeline length?

Intel didnt say that, and besides, hyperthreading was to ramp up multithreading, and also we have REAL dual core.

Intels grand design origianlly was Single Core - > HT (to make apps slowly take up multithreading) -> dual core, but AMD ruined it in a way, but it was bout time for a change.