AMD CPU speculation... and expert conjecture

[de5_Roy]

hmm.... so only amd is glofo's customer for HPP version. interesting. any news on when/if 28nm HPP is going to start producing the apus?

ye experts: how does 28nm HPP + bulk compare to other types? e.g. 28nm HPM + bulk -> does it mean mobile(laptops and lower tdp) apus up to 2.6-3.0 ghz? that situation doesn't seem bad. (most dt users except c.a.l.f. will likely feel screwed although amd has been screwing them since zambezi.. :lol
will it be enough to bring up single core perf to sandy bridge level?
i don't think the igpu will be affected much by silicon choice, right?

c.a.l.f. - cult of amd loving fanboys.

edit: HPM is tsmc's. glofo equivalent might be LPH.

 

[juanrga]

2) Charlie speculated about the XboxOne being clocked at ~1.9GHz. I also read rumours that the PS4 could be finally clocked at 2.0GHz. That are all rumours. I solicited you a proof and you are giving me none. Moreover, those 1.9--2.0Ghz are very far from your claim that the PS4 is clocked at 2.75Ghz. The 2.75GHz listed in the FCC file was the GDDR5 memory clock.

It was not speculation, based on the hardware specs, you can reconcile the clockspeed of the CPU.

3) I have more than one source. Read my reply to noob2222. If you have one source that says that Kaveri is being manufactured on SOI process, please share it with us.

http://www.techpowerup.com/forums/showthread.php?t=170062

You can't follow the link to the SOI conference anymore, however, shortly after AMD announced going bulk over a year ago, they then fired a bunch of people (those that spoke of bulk included) and then they were talking to GF a month later about FD-SOI @ 28nm at the global SOI conference...you do the math.

4) Four weeks ago Intel said:

14 nanometer on-track to enter production by the end of the year

We are on track to start production on our 14 nanometer process technology in the back half of this year

In any case, I hope that different foundries will catch Intel around the 14nm and Intel will lose the advantage.

LOL...if you believe anything out of Intel these days you're crazy. If 14nm will be on time, why the hasfail refresh and delay of everything @ 14nm node? Because they want to make less money? This is the evil empire we're talking about...decisions to make less money don't happen...even if it means cheating/lying/skewing numbers to make more money.

Before I forget this: your claim that XboxOne has not PhysX support is also incorrect

http://nvidianews.nvidia.com/Releases/NVIDIA-Announces-PhysX-Support-for-Microsoft-Xbox-One-Game-Console-997.aspx

Charlie's claim is his speculation, that is why he writes "if", before obtaining the 1.88GHz. The speculation must be very solid, but continues not being an official confirmation. Can we differentiate between speculation and official claims?

I believe that my speculation about Kaveri clocks and GFLOPS is solid, but it is my speculation and that is why I never said that it is an official claim by AMD. Do you understand the difference?

After saying you that speculations in forums by anonymous posters don't count as source, you gave me one of those!!!! And I am warned that I "can't follow the link to the SOI conference anymore". LOL And add to that I know to the poster and his record of posting nonsense/BS about Kaveri/Steamroller...

With that defensive attitude you couldn't believe anything said by Intel/AMD/Nvidia those days. Or do you believe Nvidia 'explanations' about Tegra sales? Or do you believe AMD 'explanations' about Kaveri's non-delayed delay? Or do you believe AMD saying one day that PS4 has hUMA and negating it the next day? LOL

So far as I know 14nm is on track and scheduled 14nm products are coming next year. I have given you above two confirmation made by Intel employees in a recent meeting. Maybe Broadwell delay has other causes

http://www.xbitlabs.com/news/cpu/display/20130829163840_Intel_Changes_Plans_Core_i_Broadwell_Processors_Will_Be_Available_in_LGA_Packaging_But_There_Is_a_Catch.html

Notice, they say "support"...again...anyone developing specifically for consoles would be an idiot to use a less optimal physics engine. The only edge case I could see would be a PC game that was later ported to consoles, but even then...that doesn't make a lot of sense.

http://www.dailytech.com/Report+Intel+Delays+14+nm+Broadwell+Schedules+Haswell+Refresh+for+2014/article31770.htm

http://www.pcper.com/news/Processors/Intel-Not-Releasing-14nm-Broadwell-CPUs-Next-Year-Haswell-and-Haswell-E-Will-Dominat

According to insider news from June this year...Intel is not on track.

Also, I don't believe many things companies say to a public forum. However, I believe what they're telling developers...as that doesn't get spread to the public typically.

Yes, Nvidia says "support", but this is the same than when they announced (guess what?) support for the PS4. I am not going to evaluate if developers are idiots or are not (you are more competent at that), because the point is that contrary to your claims both PS4 and XboxOne support PhysX technology from Nvidia. Like it or not and move

Your links are older than the quotes from Intel representatives. Moreover, your links are centred about supposed leaked details about roadmaps about Broadwell. I already explained what is happening with Broadwell. If as you say 14nm is not coming, where are the delays of the other 14nm products?

 

[8350rocks]

Your links are older than the quotes from Intel representatives. Moreover, your links are centred about supposed leaked details about roadmaps about Broadwell. I already explained what is happening with Broadwell. If as you say 14nm is not coming, where are the delays of the other 14nm products?

They're not due out until much later than broadwell was supposed to launch...Q4 2014 I believe...they may have it sorted out by then...maybe not.

 

[The Q6660 Inside]

I would assume FD-SOI 28nm will go in desktop/flagship mobile Kaveri units by the Q1 2014 goal.

 

[juanrga]

Kaveri is 28nm @ Glofo

AMD has not officially stated anything other than the one statement, which they will no longer confirm or deny at this point.

Don't you find that curiously odd? When AMD is asked directly about a previous statement and they're not commenting on it, or sidestep the question directly...what does that typically mean? That they're not intending to do that at all perhaps? How else would you read into that?

http://www.xbitlabs.com/news/other/display/20120205041713_IBM_Quietly_Starts_to_Make_Chips_for_AMD.html

That news is as old as your news about bulk silicon, and it says AMD has partnered off and on with IBM, who has the most advanced planar FD-SOI process in the world...

http://www.pcper.com/reviews/Editorial/GLOBALFOUNDRIES-2013-and-Beyond

That shows GF is already shipping 28nm HKMG SOI to ARM chip makers. So how is FD-SOI "not ready" yet?

The first link about FD-SOI has above top a FOLLOW UP: "AMD Denies Building Chips at IBM's Factories".

The second link has some interesting parts:

While shoring up the 32 nm process was of extreme importance to GF, it seemingly took resources away from further developing 28 nm and below processes. While work was still being done on these products, the roadmap was far too aggressive for what they were able to accomplish. The hits just kept coming though. AMD cut back on 32nm orders, which had a financial impact on both companies. It was cheaper for AMD to renegotiate the contract and take a penalty rather than order chips that it simply could not sell. GF then had lots of line space open on 32 nm SOI (Dresden) that could not be filled. AMD then voided another contract in which they suffered a larger penalty by opting to potentially utilize a second source for 28 nm HKMG production of their CPUs and APUs. AMD obviously was very uncomfortable about where GF was with their 28 nm process.

Which agrees with AMD explanation on why they chose 28nm bulk: for flexibility. Aka opening the door to being able to switch from Glofo to another foundry if Glofo was over promising once again. Do you know that Cray lost money because couldn't provide supercomputers to clients thanks to Glofo impossibility to provide Opteron chips on date?

If 28nkm FD-SOI is ready, please say me where because Globalfoundries only offers 28nm bulk

http://www.globalfoundries.com/technology/28nm.aspx

 

[hcl123]

3 FP units and 2 Integer units ? ... now this is a complete surprise if true... how ?

Perhaps 1 MMX unit with 2 pipes capable of some FP... and 2 FMAC units with 2 pipes each ? .. 256bit per pipe ?

I don't think it's a surprise. This code has been out for 9 months now.

http://gcc.gnu.org/viewcvs/gcc/trunk/gcc/config/i386

They block direct links so you have to click on bdver1.md/bdver3.md and click view.

Bdver1 (Bulldozer) had 4 FP units. They removed an MMX unit for SR. Otherwise they look quite similar so still 128bit units.

Yes but that is NOT 3 FPUs... its 1 FPU with 3 pipes, like BD/PD is 1 FPU with 4 pipes. Now that seems worst unless those FMAC pipes are 256bit capable of executing in a single cycle. Then it will be much better for all AVX, AVX 2 and XOP, 256 bit.

Now that seems worst decode for a single thread per module compared with BD/PD lol ... unless after decode there are stream loop buffers like intel LSD... or unless the 2 decodes can work for the same thread.
.

Except there are 2 of these "bdver3" decoders per module. That's been one of the biggest changes for SR. BD/PD couldn't feed the pipes fast enough except for highly parallel (cached) code.

http://images.anandtech.com/doci/6201/Screen%20Shot%202012-08-28%20at%204.38.05%20PM_575px.png

Yet is not clear if it is 2 decode engines but sharing the same 4 pipes... IMO what could be really dedicated is the input of the decoders ("pick buffers"), and output buffers ( certainly since there are for sure 2 dispatches). What seems clear is that the Vector paths are some how detached, that is, the pipes are the same 4, but 2 of them work with vector (pipe extension) in a dedicated per thread fashion, and then each "decode engine" sees its dedicated pipe with vector capability + 2 other direct path... like;

vec(direct) A Thread + {direct(pipe) + direct(pipe) }(shared) + vec(direct) B Thread

Then each thread sees 3 pipes (1vec+ 2 direct)... but there isn't 6 pipes... there are the same 4 but half shared. This could really decode 4 direct path instructions in 2 cycles (its 2 "direct pipes" shared) as revealed. Upon single thread the pertinent decode engine sees 3 pipes( 1 vec + 2 directh) like K10... and that seems what is in that GCC patch... and better it will be capable (as revealed) to dispatch 8 uops for execution per cycle (2 dispatch engines), which seems to indicated there are stream loop buffers after decode (2 direct path macro-ops per thread per 2 cycles in decode, makes 4uops per 2 cycles for dispatch/issue, not 4 per cycle per dispatch( 8 total )... kind of LSD buffers are needed).

Yes its much better at decode, but is NOT the best change to the BD design... the best change will be the "detached" L/S engines; "" The load/store queue unit is not attached to the schedulers but communicates with all the execution units separately instead. ""... meaning the "FP scheduler" is now really an extension of all the integer ones ( is not dependent), FP can proceed semi-independent of integer tracking... the 2 integer cores can now somehow work together for a single thread... and is very fit for "data speculation" and or "eager execution".

For this part alone, 15% better IPC seems short... specially attending it could have some sort of "data speculation" and or "eager execution". If something of the kind even if rudimentary, then it will put it clearly ahead of Intel, and ~30% better IPC( ops per cycle) in a generalized way seems not far fetched.

 

[8350rocks]

If 28nkm FD-SOI is ready, please say me where because Globalfoundries only offers 28nm bulk

http://www.globalfoundries.com/technology/28nm.aspx

You're funny...on the same site and same drop down menu...you passed up 32/28nm HKMG (AMD's process) to go straight to 28nm bulk.

http://www.globalfoundries.com/technology/32-28nm.aspx

The 28nm HKMG process was really only ever a half node shrink anyway. To drop down 4nm and retain the same process is really not a huge step. Especially considering that the BEOL for the 28nm bulk and HKMG FD-SOI are the same. Which is part of the reason the process ports so easily from bulk to FD-SOI. To go the opposite direction FD-SOI->Bulk is actually more complicated because there are several extra mask layers in the production process.

Even if you're right and they start on bulk...I highly doubt they finish with the product on bulk. AMD knows it's easier to go bulk->FD-SOI than the opposite direction.

Additionally...I highly doubt the initial offering (if it's indeed on bulk as you seem to be determined to think) would not be incredibly lackluster. FD-SOI is a significantly better process than even HPP bulk. Additionally, GF has already been shipping ARM CPUs on 28nm SHPP...

http://www.extremetech.com/computing/164400-globalfoundries-may-be-stealing-28nm-business-from-rival-tsmc

http://www.advancedsubstratenews.com/2012/10/go-ahead-take-28nm-fd-soi-out-for-a-test-drive/

http://hothardware.com/News/Samsung-GlobalFoundries-Announce-New-28nm-Collaboration/

Also, STMicro and IBM are partnered with GloFo and Samsung for 28nm, and STMicro and IBM both offer 28nm SHPP already in production...which means that 28nm SHPP (FD-SOI) is already available from GloFo through either themselves, or a partner...

 

[juanrga]

If 28nm FD-SOI is ready, please say me where because Globalfoundries only offers 28nm bulk

http://www.globalfoundries.com/technology/28nm.aspx

You're funny...on the same site and same drop down menu...you passed up 32/28nm HKMG (AMD's process) to go straight to 28nm bulk.

http://www.globalfoundries.com/technology/32-28nm.aspx

From Globalfoundries link:

GLOBALFOUNDRIES' industry-leading 28nm Systems-on-Chip (SoCs) design platform is based on high-k metal-gate (HKMG) technology. GLOBALFOUNDRIES is driving the global standard for new technologies such as High-k Metal Gate (HKMG) with several co-development partners including IBM, Renesas, STMicroelectronics, Samsung, and Toshiba. This 28nm HKMG solution is far superior to that currently pursued by the other leading pure-play foundries, in both scalability (die size, design compatibility, performance) and manufacturability. This 28nm solution is a "Gate-First" approach that shares the process flow, design flexibility, design elements and benefits of all previous nodes based upon poly SiON gate stacks.
Features

The technology is available in super low-power (SLP), high performance-plus (HPP) and low power, high performance (LPH) technology offerings, to cater to the complex requirements of next-generation SoC's.

The 28nm technologies are based on bulk silicon substrates, and are designed for a wide variety of applications from high performance such as graphics and wired networking to mobile computing and digital consumer to low power wireless mobile applications that require long battery lifetime.

And more of that here:

http://www.globalfoundries.com/technology/leading_edge_tech.aspx

Our 28nm technologies are based on industry-standard bulk silicon substrates and utilize the same HKMG gate stack as our 32nm-SHP. The 28nm High Performance Plus (HPP) and Super Low Power (SLP) technologies are designed for a wide variety of applications from high-performance graphics and wired networking to low-power wireless mobile applications that require long battery lifetime. Both HPP and SLP utilize HKMG technology for superior control of the channel with high on currents and low leakage current. The 28nm technology offers the smallest SRAM cell size (0.120 µm2) currently reported in the foundry industry, delivering more than twice the gate density of industry standard 40nm processes. At 28nm, GLOBALFOUNDRIES will be on the second generation of HKMG technology and the third generation of immersion lithography. And since the 28nm technology is a direct shrink of 32nm, customers will benefit greatly from the high-volume ramp of our 32nm-SHP technology.

I will not ask you again where is 28nm SOI, because it is nowhere. Currently Globo only has 28nm bulk. Globo doesn' have even ready 28nm FD-SOI risk production

 

[hcl123]

4.) This leads me to a valid, though not pressing, concern. If Intel went to 14nm FD-SOI...??? The issue being, their complex Tri-Gate FinFET would likely not mesh up well with Planar FD-SOI. Which is likely why they haven't been bothered to it so far. It would likely require heavy redesign, and they might lose a few years of development on their CPUs to make the jump to SOI. Even if they went with UTBB or one of the other processes...

I think is kind of confirmed that 14nm at intel will be "finfet on bulk". But then 10nm could be on SOI wafers... but it will be Finfet on SOI, or finfet on oxide (FOX) like IBM calls it, not FD-SOI. There is a difference in the wafers, for finfet they don't have to have those very precise Ultra Thin Body(channel) & Box(burried oxide) (edt), in fact those SOI wafer for finfet could be cheaper.

The problem is the rest, making finfet well is exponentially harder and more expensive, though the wafers can be cheaper, the overall price tends to be much higher. Besides, for low power nothing beats FD-SOI, Finfet cannot have back gate bias, and we don't know yet how far "booster" techs can push FD-SOI... it may end up FD-SOI is even better for high performance also, not only low power, and its possible FD-SOI could go for the 7nm nodes, and easier for III-V integration, so the best process for the next 5 to 7 years.. or more. After 7nm FD-SOI will be kaput to, no way to scale further those "thin" layers, finfet could be more future prone, meanwhile they are behind like STMicro showed.

Nevertheless for intel the finfet investment is already done, so most probably will be finfet on SOI (plenty of advantages)... it has cost them a literal fortune to push finfet quite ahead of all R&D institutes and universities experiments, they must have bumped their head against a wall at every turn, and finfet on bulk at intel must had been brewing at least for the last 5 years.. horrorful expensive... that is why the massive campaign of finfet the best thing since the invention of sliced bread ensued... which is now horroful evident is not true.

 

[noob2222]

Kaveri is 28nm @ Glofo

This sources the same japanese journalist. The relevant quote (my translation):

Born in in the foundry of Global Foundries, the project Steamroller / Kaveri will point again on them to keep development costs, but leaving the PD-SOI node. In addition, says Yusuke the first sample (BULK @ 28nm) seem to have reached the frequencies available and are already in possession of the motherboard manufacturers. The only uncertainties are determined by the type of production process HPP (High Performance Plus) recently entered service, and it should be used by a single user, for the moment, only AMD. GloFo, therefore, may not be interested in spending through time and money, considering that most of the gains they are doing are with the PP SLP (Super Low-Power) and LPH (low power, high performance), frustrating the efforts of the AMD about the time to market in mass or availability of these APU. The future of the steamroller, therefore, passes by Kaveri. If the association with GloFo proves to be fruitful, Steamroller would be marketed soon. Otherwise prepare for the worst. Richland, at this time, has a precise function: if Kaveri should be delayed (or worse, canceled), AMD would have an APU at least until mid-2014. From here backwards compatibility with FM2+ motherboards.

wow ... he (whoever yusuke is) claims bulk ... but doesn't know what process its going to be.

The funny part is how everything lines up. GF is risk producing 28nm FD-SOI in q4 2013, Kaveri will be limited quantities Q4 2013. GF is volume producing 28nm FD-SOI in q1 2014, Kaveri is public available Q1 2014. Yet ... kaveri is bulk ...

juanrga said:
ä

If 28nkm FD-SOI is ready, please say me where because Globalfoundries only offers 28nm bulk

•Regarding the roll-out, he concluded, “A PDK of this technology is available this quarter, and GlobalFoundries has partnered with ST for volume manufacturing and will be entering risk production in the 4th quarter of 2013, with volume production in the first half of 2014.”

http://semimd.com/hars/tag/globalfoundries/

ALSO


JMC: For manufacturing, 28nm FD-SOI technology uses the same toolset as for 28nm LP bulk. Process development is complete, and ST/Crolles fab is now working to bring yield at production levels and complete the qualification of the technology, as done for any other.

Phase-in of the technology at GlobalFoundries is planned to start Q1 2013, with process qualified and with production level yield foreseen for Q4 2013.
http://semimd.com/hars/2012/10/08/sts-fd-soi-tech-available-to-all-through-gf/

Aside from GF being able to use the wafers, you have to have the wafer itself.

http://www.advancedsubstratenews.com/2013/07/ready-for-fd-soi-says-worlds-largest-silicon-wafer-company/

So WHY ISN'T GF ADVERTISING THEIR SOI FOR SALE ON THEIR WEBSITE??????

Its not q4 2013 yet, and likely first run productions are limited to those who worked with GF to get that production ramped up. Did you help them?

To sum it up:

Amd likely made testing production on bulk (probably because GF didn't have any FD-SOI wafers to actually use)

GF's announced 28nm FD-SOI timeline co-incides with kaveri's launch rumors.

IMO, bulk AMD will be slow and if AMD does another downgrade in computing power, they are done. This is why if bulk isn't up to speed it will be SOI. We don't need AMD to be "slightly faster than VIA".

 

[hcl123]

If 28nkm FD-SOI is ready, please say me where because Globalfoundries only offers 28nm bulk

http://www.globalfoundries.com/technology/28nm.aspx

Glofo has FD-SOI alright, only not quite ready... 1H 2014 is the roadmap (other articles).

http://www.advancedsubstratenews.com/2013/04/gfs-two-flavors-of-fd-soi-kengeri-explains-exclusive-asn-qa/

And they are not so shy to evidence the cost advantages (they could have try to hide it and charge the same or more, studies now don't allow it)... before they were about to ditch SOI altogether, the contract for 32nm PD-SOI was what hold their hand(why BD didn't debuted above 4Ghz)... thye may end up with more costumers for FD-SOI than planar bulk or finfet on bulk ( the first is kaput anyway).

http://www.advancedsubstratenews.com/2013/07/globalfoundries-on-cost-vs-performance-for-fd-soi-bulk-and-finfet/

If i were AMD all production will go FD-SOI including GPGPUs lol

 

[8350rocks]

4.) This leads me to a valid, though not pressing, concern. If Intel went to 14nm FD-SOI...??? The issue being, their complex Tri-Gate FinFET would likely not mesh up well with Planar FD-SOI. Which is likely why they haven't been bothered to it so far. It would likely require heavy redesign, and they might lose a few years of development on their CPUs to make the jump to SOI. Even if they went with UTBB or one of the other processes...

I think is kind of confirmed that 14nm at intel will be "finfet on bulk". But then 10nm could be on SOI wafers... but it will be Finfet on SOI, or finfet on oxide (FOX) like IBM calls it, not FD-SOI. There is a difference in the wafers, for finfet they don't have to have those very precise Ultra Thin Box an burried oxides, in fact those SOI wafer for finfet could be cheaper.

The problem is the rest, making finfet well is exponentially harder and more expensive, though the wafers can be cheaper, the overall price tends to be much higher. Besides, for low power nothing beats FD-SOI, Finfet cannot have back gate bias, and we don't know yet how far "booster" techs can push FD-SOI... it may end up FD-SOI is even better for high performance also, not only low power, and its possible FD-SOI could go for the 7nm nodes, and easier for III-V integration, so the best process for the next 5 to 7 years.. or more. After 7nm FD-SOI will be kaput to, no way to scale further those "thin" layers, finfet could be more future prone, meanwhile they are behind like STMicro showed.

Nevertheless for intel the finfet investment is already done, so most probably will be finfet on SOI (plenty of advantages)... it has cost them a literal fortune to push finfet quite ahead of all R&D institutes and universities experiments, they must have bumped their head against a wall at every turn, and finfet on bulk at intel must had been brewing at least for the last 5 years.. horrorful expensive... that is why the massive campaign of finfet the best thing since the invention of sliced bread ensued... which is now horroful evident is not true.

It's not even in the realm of reality for FinFET to be feasible in terms of cost past 14nm I wouldn't expect. FD-SOI will be far better @ >=10nm.

What a fortune they must've spent guessing wrong. It kind of makes me laugh...honestly...serves them right.

 

[8350rocks]

http://www.xbitlabs.com/news/cpu/display/20130826233053_AMD_Further_Delays_Launches_of_New_APU_Products_Report.html

Old news....*yawn*

 

[-Fran-]

In other news:

http://www.phoronix.com/scan.php?page=news_item&px=MTQ1MTA

GCC 4.9 with AVX2 for Haswell. Looks like mostly good stuff.

Will SR or current PD support AVX2? Do they have the same improvement/regression in different areas as Intel?

Cheers!

 

[esrever]

The CPU clocks don't have to be limited to 2.1/2.9Ghz. Glofo claims in his website that its High performance 28nm bulk can go above 3 Ghz. I also read in some part that Glofo claimed that they had perfected the bulk process closing the gap with SOI.

Ok, I scoured high and low and found ONE bulk chip made by TSMC that broke 3.5Ghz. It's the Sparc T5 which has a max clock of 3.6Ghz. If GF can catch up and match that's not too too bad, but still a far cry from the 4.4Ghz turbo of the A10-6800K. That's about 20% slower which would eat away a sizable chunk of a 30% performance gain (being optimistic) for SR.

http://en.wikipedia.org/wiki/SPARC_T5

Interesting. I wait a reduction on clocks compared to Richland, otherwise I am unable to explain the official 1050 GFLOPS claimed by AMD for Kaveri.

up the gpu clocks and down the cpu clocks.

 

[griptwister]

What the??? LOL! If this isn't a typo, these Volcanic Island GPUs sound impressive with their DDR5.

http://www.amdoverclock.net/amd-volcanic-islands-gpu-family-possible-specifications-and-mid-october-launch-revealed/

*edit* I know DDR essentially the same as GDDR, but I'm curious to see if there would be a performance increase.

 

[hcl123]

So WHY ISN'T GF ADVERTISING THEIR SOI FOR SALE ON THEIR WEBSITE??????

Its not q4 2013 yet, and likely first run productions are limited to those who worked with GF to get that production ramped up. Did you help them?

To sum it up:

Amd likely made testing production on bulk (probably because GF didn't have any FD-SOI wafers to actually use)

GF's announced 28nm FD-SOI timeline co-incides with kaveri's launch rumors.

IMO, bulk AMD will be slow and if AMD does another downgrade in computing power, they are done. This is why if bulk isn't up to speed it will be SOI. We don't need AMD to be "slightly faster than VIA".

Actually all foundries wafers are 3th part supply, including plain bulk (and there are variations on cristal orientation for bulk)... i think only intel does their own wafers...

And in reality AMD could had picked kaveri design, buy a couple of wafers, and make a "test drive" for almost free..

http://www.advancedsubstratenews.com/2012/10/go-ahead-take-28nm-fd-soi-out-for-a-test-drive/

I don't know if they did, but they could have done this test easily, CMP and Leti provided... kaveri on FD-SOI... ( is a test... for production then enter all the licensing, supply agreements etc)

 

[8350rocks]

http://www.xbitlabs.com/news/cpu/display/20130826233053_AMD_Further_Delays_Launches_of_New_APU_Products_Report.html

So WHY ISN'T GF ADVERTISING THEIR SOI FOR SALE ON THEIR WEBSITE??????

Its not q4 2013 yet, and likely first run productions are limited to those who worked with GF to get that production ramped up. Did you help them?

To sum it up:

Amd likely made testing production on bulk (probably because GF didn't have any FD-SOI wafers to actually use)

GF's announced 28nm FD-SOI timeline co-incides with kaveri's launch rumors.

IMO, bulk AMD will be slow and if AMD does another downgrade in computing power, they are done. This is why if bulk isn't up to speed it will be SOI. We don't need AMD to be "slightly faster than VIA".

Actually all foundries wafers are 3th part supply, including plain bulk (and there are variations on cristal orientation for bulk)... i think only intel does their own wafers...

And in reality AMD could had picked kaveri design, buy a couple of wafers, and make a "test drive" for almost free..

http://www.advancedsubstratenews.com/2012/10/go-ahead-take-28nm-fd-soi-out-for-a-test-drive/

I don't know if they did, but they could have done this test easily, CMP and Leti provided... kaveri on FD-SOI... ( is a test... for production then enter all the licensing, supply agreements etc)

GloFo had been getting SOI wafers from Soitec in France IIRC.

 

[hcl123]

4.) This leads me to a valid, though not pressing, concern. If Intel went to 14nm FD-SOI...??? The issue being, their complex Tri-Gate FinFET would likely not mesh up well with Planar FD-SOI. Which is likely why they haven't been bothered to it so far. It would likely require heavy redesign, and they might lose a few years of development on their CPUs to make the jump to SOI. Even if they went with UTBB or one of the other processes...

I think is kind of confirmed that 14nm at intel will be "finfet on bulk". But then 10nm could be on SOI wafers... but it will be Finfet on SOI, or finfet on oxide (FOX) like IBM calls it, not FD-SOI. There is a difference in the wafers, for finfet they don't have to have those very precise Ultra Thin Box an burried oxides, in fact those SOI wafer for finfet could be cheaper.

The problem is the rest, making finfet well is exponentially harder and more expensive, though the wafers can be cheaper, the overall price tends to be much higher. Besides, for low power nothing beats FD-SOI, Finfet cannot have back gate bias, and we don't know yet how far "booster" techs can push FD-SOI... it may end up FD-SOI is even better for high performance also, not only low power, and its possible FD-SOI could go for the 7nm nodes, and easier for III-V integration, so the best process for the next 5 to 7 years.. or more. After 7nm FD-SOI will be kaput to, no way to scale further those "thin" layers, finfet could be more future prone, meanwhile they are behind like STMicro showed.

Nevertheless for intel the finfet investment is already done, so most probably will be finfet on SOI (plenty of advantages)... it has cost them a literal fortune to push finfet quite ahead of all R&D institutes and universities experiments, they must have bumped their head against a wall at every turn, and finfet on bulk at intel must had been brewing at least for the last 5 years.. horrorful expensive... that is why the massive campaign of finfet the best thing since the invention of sliced bread ensued... which is now horroful evident is not true.

It's not even in the realm of reality for FinFET to be feasible in terms of cost past 14nm I wouldn't expect. FD-SOI will be far better @ >=10nm.

What a fortune they must've spent guessing wrong. It kind of makes me laugh...honestly...serves them right.

The problem is that at the time, there wasn't even any assurance that UTBB kind of FD-SOI, the one really interesting, would be possible to scale even for 14nm... uniformity of the wafers was a big issue... then in their hurry an eagerness to be first and ahead of everybody, intel launched the huge finfet investment.

Now if Soitec is true, and is possible uniformities of 0.2nm (2 angstroms) for an entire 300mm wafer, i think that is even possible UTBB FD-SOI at the ~7/8 nm node, with 4 to 5 nm buried Boxes...

It could be a long time to be right, but after 7nm FD-SOI is kaput... and even 7nm is not sure yet.

Nevertheless is a lesson that not always being first is the most wise lol ... i think intel believes too much in their own psychotic marketing... first to this first to that... instead of being really better without counting with "twisted" benchmarks, and not really matter too much time to market. Intel is a company driven by marketing, not "innovation and engineering", they seem today too much dependent on copying ideas, (64bit, multicore, QPI ≃ HT, CPU+GPU etc) and they will copy much more ( AMD like modules for those cores lol etc)...

 

[hcl123]

In other news:

http://www.phoronix.com/scan.php?page=news_item&px=MTQ1MTA

GCC 4.9 with AVX2 for Haswell. Looks like mostly good stuff.

Will SR or current PD support AVX2? Do they have the same improvement/regression in different areas as Intel?

Cheers!

I think it was already posted here AMD FP256... 256bit FP pipes capable of 256 bit instruction execution without halfs. Seems to indicate AVX2.

Nevertheless they better.... support AVX 2... otherwise they will take a marketing and benchmark beating like never seen before, even if none "current software" out there will use AVX 2 for years.

 

[juanrga]

The CPU clocks don't have to be limited to 2.1/2.9Ghz. Glofo claims in his website that its High performance 28nm bulk can go above 3 Ghz. I also read in some part that Glofo claimed that they had perfected the bulk process closing the gap with SOI.

Ok, I scoured high and low and found ONE bulk chip made by TSMC that broke 3.5Ghz. It's the Sparc T5 which has a max clock of 3.6Ghz. If GF can catch up and match that's not too too bad, but still a far cry from the 4.4Ghz turbo of the A10-6800K. That's about 20% slower which would eat away a sizable chunk of a 30% performance gain (being optimistic) for SR.

http://en.wikipedia.org/wiki/SPARC_T5

Interesting. I wait a reduction on clocks compared to Richland, otherwise I am unable to explain the official 1050 GFLOPS claimed by AMD for Kaveri.

up the gpu clocks and down the cpu clocks.

I was referring to the CPU; yes, the GPU would be clocked higher than Richland. I wait ~900 MHz.

 

[juanrga]

To sum it up:

Amd likely made testing production on bulk (probably because GF didn't have any FD-SOI wafers to actually use)

GF's announced 28nm FD-SOI timeline co-incides with kaveri's launch rumors.

IMO, bulk AMD will be slow and if AMD does another downgrade in computing power, they are done. This is why if bulk isn't up to speed it will be SOI. We don't need AMD to be "slightly faster than VIA".

If 28nkm FD-SOI is ready, please say me where because Globalfoundries only offers 28nm bulk

http://www.globalfoundries.com/technology/28nm.aspx

Glofo has FD-SOI alright, only not quite ready... 1H 2014 is the roadmap (other articles).

http://www.advancedsubstratenews.com/2013/04/gfs-two-flavors-of-fd-soi-kengeri-explains-exclusive-asn-qa/

And they are not so shy to evidence the cost advantages (they could have try to hide it and charge the same or more, studies now don't allow it)... before they were about to ditch SOI altogether, the contract for 32nm PD-SOI was what hold their hand(why BD didn't debuted above 4Ghz)... thye may end up with more costumers for FD-SOI than planar bulk or finfet on bulk ( the first is kaput anyway).

http://www.advancedsubstratenews.com/2013/07/globalfoundries-on-cost-vs-performance-for-fd-soi-bulk-and-finfet/

If i were AMD all production will go FD-SOI including GPGPUs lol

Therefore, as I said FD-SOI 28nm isn't ready, contrary to claims made here by others.

Kaveri presentation at Computex and samples used by mobo makers have to be bulk. What consequences has, if any, that Gigabyte released a kaveri mobo using a bulk model for testing if the final Kaveri is FD-SOI?

 

[8350rocks]

Therefore, as I said FD-SOI 28nm isn't ready, contrary to claims made here by others.

Kaveri presentation at Computex and samples used by mobo makers have to be bulk. What consequences has, if any, that Gigabyte released a kaveri mobo using a bulk model for testing if the final Kaveri is FD-SOI?

Actually, for Gigabyte, or any MB manufacturer, it would make literally no difference. Though, the FD-SOI chips would clearly operate at a much lower temperature and perform better.

The BIOS updates for those chips when they launch would likely be different...however, above and beyond that, the board design wouldn't change any.

 

[esrever]

The CPU clocks don't have to be limited to 2.1/2.9Ghz. Glofo claims in his website that its High performance 28nm bulk can go above 3 Ghz. I also read in some part that Glofo claimed that they had perfected the bulk process closing the gap with SOI.

Ok, I scoured high and low and found ONE bulk chip made by TSMC that broke 3.5Ghz. It's the Sparc T5 which has a max clock of 3.6Ghz. If GF can catch up and match that's not too too bad, but still a far cry from the 4.4Ghz turbo of the A10-6800K. That's about 20% slower which would eat away a sizable chunk of a 30% performance gain (being optimistic) for SR.

http://en.wikipedia.org/wiki/SPARC_T5

Interesting. I wait a reduction on clocks compared to Richland, otherwise I am unable to explain the official 1050 GFLOPS claimed by AMD for Kaveri.

up the gpu clocks and down the cpu clocks.

I was referring to the CPU; yes, the GPU would be clocked higher than Richland. I wait ~900 MHz.

90% of that 1TF comes from the gpu.

 

[juanrga]

The CPU clocks don't have to be limited to 2.1/2.9Ghz. Glofo claims in his website that its High performance 28nm bulk can go above 3 Ghz. I also read in some part that Glofo claimed that they had perfected the bulk process closing the gap with SOI.

Ok, I scoured high and low and found ONE bulk chip made by TSMC that broke 3.5Ghz. It's the Sparc T5 which has a max clock of 3.6Ghz. If GF can catch up and match that's not too too bad, but still a far cry from the 4.4Ghz turbo of the A10-6800K. That's about 20% slower which would eat away a sizable chunk of a 30% performance gain (being optimistic) for SR.

http://en.wikipedia.org/wiki/SPARC_T5

Interesting. I wait a reduction on clocks compared to Richland, otherwise I am unable to explain the official 1050 GFLOPS claimed by AMD for Kaveri.

up the gpu clocks and down the cpu clocks.

I was referring to the CPU; yes, the GPU would be clocked higher than Richland. I wait ~900 MHz.

90% of that 1TF comes from the gpu.

I wait 921.6 GFLOPs for the GPU, i.e. 88%