AMD CPU speculation... and expert conjecture

[truegenius]

Spoiler

And unsurprisingly you [strike]avoid[/strike] didn't understand the same question by third time. I was not asking you how many GB you believe the game will require. I was asking you how many GB those APUs have.

You pretended that those APUs couldn't be used to play your imaginary game, because (you believed) couldn't "store the game data need need for processing by igp", but you cannot even answer how many data those APUs can store.

In short, you were criticizing what you don't understand.

corrected

i didn't thought that english will be so hard language , seems like its time for me to join some english classes
here it is ( EnglishClassesJoinedTogether )
now i think i studied enough english to understand your question
so you want me to predict the amount of ram that you hypothetical apus will offer
if yes then considering cpu cores, igpu (better than "hawai") and iram on same die then we won't see ram size in double digits till 2020 even if we use hbm v2 or 3
all these things on same die without burning a hole in your cabinet and pocket/wallet/debit/credit card

amd to launch new single gpu gfx card to compete with gtx 780ti
http://www.techpowerup.com/200721/amd-to-launch-new-single-gpu-card-this-summer-to-take-on-gtx-780-ti.html
will have stacked high bandwidth memory (hbm). matter of time before it trickles down to apus!!!.....hopefully.

As I mentioned before AMD plans to offer HBM for K12 APUs.

It is funny how only a pair of month when I mentioned that AMD was preparing APUs with stacked RAM for 2018, someone here (not you) pretended that stacked ram would be not ready before the year "2030".

using hbm in graphics cards is viable choice as it decreases the number of potato chips that surrounds the gpu dies on a card
they are not producing gpu die with iram ( not apple's thing )
and this is what you are saying in your hypothetical apus, apus with on die tons of iram with volcanos of Hawaii

are you pointing to the bandwidth numbers? you have never explained where they come from or how they were measured/calculated or how they work. comparing GB/s numbers are near-meaningless without other factors explained. for example (and example only, don't try pulling an argument out of this), sram can go into TB/s bandwitdh, yet we don't see sram displacing dram.

First you asked "what" and I replied. Then you asked "why" and I replied again. Now you are asking me the "how". You change the question with each new answer.

Your argument about SRAM is irrelevant to the facts discussed here: GDDR5 has replaced the slow DDR3 in any high-end graphics card; Sony uses GDDR5 instead of slow DDR3 as system memory for the PS4; I already explained "why".

i didn't quite get what "GDDR5 allows data to be transmitted on both peaks of the signal" means, since ddr ram sends data on both edges of clock signal, not just gddr5.

DDR3 only handles an input or output but not both on the same cycle. GDDR handles input and output on the same cycle.

i don't know if roy is pulling your legs , if not then you can use difference of qdr and ddr to explain gddr5 and ddr3's difference

 

[de5_Roy]

i don't know if roy is pulling your legs , if not then you can use difference of qdr and ddr to explain gddr5 and ddr3's difference

i'm not. i just want to know why he thinks gddr5 is advanced enough that it is "beyond" ddr3 while available info says different (but not essentially otherwise). memory standards and architectures follow incremental evolution just like most of technology. to be "beyond", gddr5 has to possess something extra-ordinary compared to ddr3. afaik, it doesn't. gddr5 is like a application-specific, branch-evolution of ddr (not to confuse with ddr3).

 

[gamerk316]

i don't know if roy is pulling your legs , if not then you can use difference of qdr and ddr to explain gddr5 and ddr3's difference

i'm not. i just want to know why he thinks gddr5 is advanced enough that it is "beyond" ddr3 while available info says different (but not essentially otherwise). memory standards and architectures follow incremental evolution just like most of technology. to be "beyond", gddr5 has to possess something extra-ordinary compared to ddr3. afaik, it doesn't. gddr5 is like a application-specific, branch-evolution of ddr (not to confuse with ddr3).

I'll answer for him: Sony chose to go with GDDR5 because they need to feed the GPU, which in this case is an APU. DDR3 is simply to slow to feed GPU's.

 

[8350rocks]

juan:

Where is your factual basis for making the ASSUMPTION that a 100W ARM core will do more than a 100W x86 core?

Where is the analyzed proof? I ask, because I have never seen a 100W ARM core, so much less would I expect anyone to have fabbed one up, even an ES, just to run some real world tests.

Essentially what you are saying is based on your highly skewed opinion, with no basis on any factually indisputable evidence, a 100W ARM core will outperform a 100W x86 core.

Let us be fair, as you tend to point out speculation from EVERYONE BUT YOURSELF...then provide your skewed opinion as fact.

 

[gamerk316]

Also, restarting the OGL vs D3D debate:

http://richg42.blogspot.co.uk/2014/05/things-that-drive-me-nuts-about-opengl.html?spref=tw

I love it when experts agree with me.

 

[de5_Roy]

I'll answer for him: Sony chose to go with GDDR5 because they need to feed the GPU, which in this case is an APU. DDR3 is simply to slow to feed GPU's.

i know that. but that doesn't somehow make gddr5 much more advanced than ddr3. gddr5 was used because it was advantageous for that specific purpose.

 

[jdwii]

Also, restarting the OGL vs D3D debate:

http://richg42.blogspot.co.uk/2014/05/things-that-drive-me-nuts-about-opengl.html?spref=tw

I love it when experts agree with me.

Its easy to understand if their is no bias from the OpenGL fanboys. Almost everyone who works in OpenGL knows it needs to be rewritten or have something else take over.

 

[juanrga]

Spoiler

i didn't thought that english will be so hard language , seems like its time for me to join some english classes
here it is ( EnglishClassesJoinedTogether )
now i think i studied enough english to understand your question
so you want me to predict the amount of ram that you hypothetical apus will offer
if yes then considering cpu cores, igpu (better than "hawai") and iram on same die then we won't see ram size in double digits till 2020 even if we use hbm v2 or 3
all these things on same die without burning a hole in your cabinet and pocket/wallet/debit/credit card

Wrong ram size. This show again that you did spread FUD about hardware that you don't understand.

i don't know if roy is pulling your legs , if not then you can use difference of qdr and ddr to explain gddr5 and ddr3's difference

Not a good idea, because GDDR5 is not quad data rate. Both DDR3 and GDDR5 are... double data rate.

 

[juanrga]

I'll answer for him: Sony chose to go with GDDR5 because they need to feed the GPU, which in this case is an APU. DDR3 is simply to slow to feed GPU's.

I already said that to him:

The PS4 uses GDDR5 @ 2750MHz as system memory. DDR3 @ 3000MHz would offer only about one half of the bandwidth.

I also gave him PS4 memory bandwidth in GB/s and explained him why GDDR5 can provide double throughput than DDR3. He continues without understanding why I said that DDR is slow than GDDR5.

 

[juanrga]

juan:

Where is your factual basis for making the ASSUMPTION that a 100W ARM core will do more than a 100W x86 core?

Where is the analyzed proof? I ask, because I have never seen a 100W ARM core, so much less would I expect anyone to have fabbed one up, even an ES, just to run some real world tests.

Essentially what you are saying is based on your highly skewed opinion, with no basis on any factually indisputable evidence, a 100W ARM core will outperform a 100W x86 core.

Let us be fair, as you tend to point out speculation from EVERYONE BUT YOURSELF...then provide your skewed opinion as fact.

First let me do this clear: there is no problem with your speculations, even when 9 out of each 10 they are wrong or nonsense. The problem is when you present your own speculations are if were official claims from AMD or when you present them here as "my-friend-at-AMD said so, trust me".

Once said that, let us on topic. I already explained to you why ARM chips have the potential to be faster than x86 chips. I gave several details, from hardware details such as registers or decoders to mentioning software stuff such as advanced compiler optimizations. This discussion is old and goes back to when you wrote lots of nonsense about RISC vs CISC. Much before A57 was benchmarked I predicted here which would be its performance. I compared it to several Opteron and FX chips. And benchmarks show that I was right once again.

More recently I gave you relevant quotes from the K12 chief architect:

Presumably, these sister x86 and ARM cores will perform about the same, but they evidently are not just two variants of the same microarchitecture adapted to different ISAs. Keller was very complimentary about the ARMv8 ISA in his talk, saying it has more registers and "a proper three-operand instruction set." He noted that ARMv8 doesn't require the same instruction decoding hardware as an x86 processor, leaving more room to concentrate on performance. Keller even outright said that "the way we built ARM is a little different from x86" because it "has a bigger engine." I take that to mean AMD's ARM-compatible microarchitecture is somewhat wider than its sister, x86-compatible core. We'll have to see how that difference translates into performance in the long run.

And:

Given what Keller and Papermaster shared, the answer seems quite obvious. If AMD were only offering A57-based parts like Seattle, it might have trouble standing out, but we're talking now about a full-fledged, next-generation processor worthy of the Opteron name. [...] If it enables the folks building data centers to get the same sort of per-thread performance from ARM-based servers that they can from x86 processors, the K12 could obviate the need for x86 CPUs almost entirely. It could help key a dramatic transition from a single dominant ISA to two competing options—or it might even spark a longer transition away from the Intel-dominated x86 world to one ruled by the more open and expansive ARM ecosystem.

I have been saying this kind of stuff since last year. I already knew this stuff before Keller said.

 

[juanrga]

Jaguar core has about a 90% of the IPC of Steamroller core.

Based on every single benchmark i seen jaguar doesn't get anywhere near that level please show me a real world benchmark stating otherwise since its your claim i should not have to go search for that, not claiming your wrong just stating that comment sounds like something Amd would say not something benchmarks actually show.

Jaguar provides between 92% and 98% of the IPC of Steamroller and between 103% and 113% of the IPC of Piledriver

http://www.extremetech.com/computing/174980-its-time-for-amd-to-take-a-page-from-intel-and-dump-steamroller

Considering that AMD admits that A57 core produces about the 136% of jaguar. This implies that the standard A57 core already produces a much higher IPC than Piledriver.

 

[Cazalan]

AMD replaced jaguar servers by ARM servers because x86 cannot compete. AMD was very clear with its "ARM will win" slide. ARM is designing a custom ARM core by this reason. Their K12 core will compete with any core from Apple, Qualcomm, and others.

That's nice that you think AMD's first generation ARMv8 core will be able to compete with Apples 4th generation, and Qualcomm's 3rd generation ARMv8 core.

 

[Cazalan]

That is interesting but Amd claims 2-4 times the performance compared to their current 4 core, its important to remember to look at the 5% higher clock rate and then realize it has double the cores. And then its important to look at the fact that jaguar only features 80% the performance per clock compared to piledriver let alone steamroller , then after we figure that out its important to remember that a 4 core Piledriver CPU is competing with a dual core I3 in terms of performance and in some cases the 6 core PD is competing with an I3. Amd is really far behind in IPC to the point where i'm switching over to Intel until Amd comes out with a newer design.

And Jaguar is missing the 8MB L3 cache that Seattle adds.

 

[8350rocks]

That is interesting but Amd claims 2-4 times the performance compared to their current 4 core, its important to remember to look at the 5% higher clock rate and then realize it has double the cores. And then its important to look at the fact that jaguar only features 80% the performance per clock compared to piledriver let alone steamroller , then after we figure that out its important to remember that a 4 core Piledriver CPU is competing with a dual core I3 in terms of performance and in some cases the 6 core PD is competing with an I3. Amd is really far behind in IPC to the point where i'm switching over to Intel until Amd comes out with a newer design.

And Jaguar is missing the 8MB L3 cache that Seattle adds.

EXACTLY! But do not let Juan see...he will try to dismiss it as something you made up...

Juan, in June I will be going to AMD HQ. I will not be able to discuss any of the things I talk about there, however, I will most likely have some pics to share so you can see that I do not know anyone at AMD first hand

 

[palladin9479]

I'll answer for him: Sony chose to go with GDDR5 because they need to feed the GPU, which in this case is an APU. DDR3 is simply to slow to feed GPU's.

i know that. but that doesn't somehow make gddr5 much more advanced than ddr3. gddr5 was used because it was advantageous for that specific purpose.

It can't be more advanced then DDR3 as it's the same technology. GDDR5 is nothing but DDR3 technology enhanced for graphics usage. It writes two words per cycle vs DDR3's single word and has a prefetch buffer along with a different channel configuration. DDR3 is 64-bit per channel while GDDR5 is 32-bit. Because of how close to the chip it is GDDR5 is often configured is 4~16x channel configurations which allows for obscene bandwidths but does nothing for the latency. Both DDR3 and GDDR5 run at about the same clock speed. Oh and GDDR5 has a much higher command latency then DDR3 which isn't a big deal with GPU's but can be a huge problem with CPU's.

 

[jdwii]

Jaguar core has about a 90% of the IPC of Steamroller core.

Based on every single benchmark i seen jaguar doesn't get anywhere near that level please show me a real world benchmark stating otherwise since its your claim i should not have to go search for that, not claiming your wrong just stating that comment sounds like something Amd would say not something benchmarks actually show.

Jaguar provides between 92% and 98% of the IPC of Steamroller and between 103% and 113% of the IPC of Piledriver

http://www.extremetech.com/computing/174980-its-time-for-amd-to-take-a-page-from-intel-and-dump-steamroller

Considering that AMD admits that A57 core produces about the 136% of jaguar. This implies that the standard A57 core already produces a much higher IPC than Piledriver.

Thanks for the link that site shows indeed just that.

 

[Cazalan]

at this point i open the questions to Everyone, since juanrga is having trouble explaining.

DDR3 has 1 differential clock; CK, data is transferred on both the rising and falling edge of CK. Ex:

DDR3-2133 has CK of 1.066Ghz. 2x1.066Ghz gives 2.133GT/pin, 2.133GTx64bits (DIMM) = 136 Gbit/s / 8(b/B) = 17GB/s


GDDR5 has 2 differential clocks (technically 3 but for reasons of simplicity), CK, WCK, data is transferred on both the rising and falling edge of WCK and WCK is 2x the CK frequency. Ex:

GDDR5 with a CK of 1.375Ghz, 2x1.375Ghz = WCK = 2.75Ghz, 2x2.75Ghz = 5.5GT/pin, 5.5GTx64bits = 352Gb/s / 8(b/B) = 44 GB/s

Now both PS4 and XB1 have 256bit memory interfaces, so multiply by 4.
PS4 = 4x44GB/s = 176 GB/s
XB1 = 4x17GB/s = 68 GB/s

In short its due to the extra clock doubling from CK->WCK. And in general the confusion comes from the practice of listing the "effective clock frequency" instead of the true clock frequencies.

Note that WCK of 2.75Ghz is why the maximum frequency of PS4 was listed at 2.75Ghz for the FCC filing.

 

[truegenius]

Spoiler

Wrong ram size. This show again that you did spread FUD about hardware that you don't understand.

am i supposed to give right answer for something which is wrong
i was almost sure to be wrong because i don't agree with you on such a hypothetical apu
thus as its your fud of exascale apu so you should tell us these things
so tell us what your hypothetical apu will be (tell us the numbers)
atleast tell me these things cpu core count, gpu core count, gpu arch, cpu arch, iram, tdp, die size, cost per die so that we can have something more comparable even if its complete fud

 

[de5_Roy]

I already said that to him:

I also gave him PS4 memory bandwidth in GB/s and explained him why GDDR5 can provide double throughput than DDR3. He continues without understanding why I said that DDR is slow than GDDR5.

read the posts from cazalan and palladin to see why i called your "explanations" so inadequate and kept asking for details.

 

[gamerk316]

Also, restarting the OGL vs D3D debate:

http://richg42.blogspot.co.uk/2014/05/things-that-drive-me-nuts-about-opengl.html?spref=tw

I love it when experts agree with me.

Its easy to understand if their is no bias from the OpenGL fanboys. Almost everyone who works in OpenGL knows it needs to be rewritten or have something else take over.

The entire API approach is wrong, frankly. I believe OGL is fundamentally unfixable. Therefore, a new API is needed to replace it.

 

[gamerk316]

I'll answer for him: Sony chose to go with GDDR5 because they need to feed the GPU, which in this case is an APU. DDR3 is simply to slow to feed GPU's.

i know that. but that doesn't somehow make gddr5 much more advanced than ddr3. gddr5 was used because it was advantageous for that specific purpose.

It can't be more advanced then DDR3 as it's the same technology. GDDR5 is nothing but DDR3 technology enhanced for graphics usage. It writes two words per cycle vs DDR3's single word and has a prefetch buffer along with a different channel configuration. DDR3 is 64-bit per channel while GDDR5 is 32-bit. Because of how close to the chip it is GDDR5 is often configured is 4~16x channel configurations which allows for obscene bandwidths but does nothing for the latency. Both DDR3 and GDDR5 run at about the same clock speed. Oh and GDDR5 has a much higher command latency then DDR3 which isn't a big deal with GPU's but can be a huge problem with CPU's.

And that latency is the tradeoff. Sony can get away with it by keeping a lighter OS though, but if you tried GDDR5 on a Windows platform...can't imagine it would be pretty.

 

[Embra]

Adaptive-Sync will become standard for the DisplayPort 1.2a specification
http://www.forbes.com/sites/jasonevangelho/2014/05/12/amds-project-freesync-gets-momentum-as-adaptive-sync-gets-added-to-displayport-spec/

 

[juanrga]

That's nice that you think AMD's first generation ARMv8 core will be able to compete with Apples 4th generation, and Qualcomm's 3rd generation ARMv8 core.

I am optimistic because the team responsible for the Bulldozer architecture was fired and the new team is leaded by Keller, who has developed successful x86 (at AMD) and ARM architectures (at Apple).

 

[juanrga]

That is interesting but Amd claims 2-4 times the performance compared to their current 4 core, its important to remember to look at the 5% higher clock rate and then realize it has double the cores. And then its important to look at the fact that jaguar only features 80% the performance per clock compared to piledriver let alone steamroller , then after we figure that out its important to remember that a 4 core Piledriver CPU is competing with a dual core I3 in terms of performance and in some cases the 6 core PD is competing with an I3. Amd is really far behind in IPC to the point where i'm switching over to Intel until Amd comes out with a newer design.

And Jaguar is missing the 8MB L3 cache that Seattle adds.

EXACTLY! But do not let Juan see...he will try to dismiss it as something you made up...

I have several benchmarks showing an ARM core beating jaguar cores without using L3 cache, but I will leave both of you believing otherwise.

Juan, in June I will be going to AMD HQ. I will not be able to discuss any of the things I talk about there, however, I will most likely have some pics to share so you can see that I do not know anyone at AMD first hand

What? Are you saying that you will not return here to say us how they said you that AMD is going to release a HEDT 16-core Steamroller CPU at 5GHz on magical FD-SOI 20nm for the new AM4 platform that you found in the chinese site? I am a bit disappointed.

 

[juanrga]

Wrong ram size. This show again that you did spread FUD about hardware that you don't understand.

am i supposed to give right answer for something which is wrong

You are supposed to know some basic facts about the hardware on which you are commenting on.

You have shown you have no idea of which is the memory size of that hardware, but this didn't stop you from spreading FUD about the hardware being unable (in your imagination) to store game data for 8k. :lol: