AMD CPU speculation... and expert conjecture

[Cazalan]

From a cost/integration standpoint, sure. But keep in mind, that all takes die space, and makes thermals a challenge. You can't continue to assume the transistor will continue to shrink anymore. I'm also worried about upgradability. In theory, more stuff on the CPU is plenty of justification for more expensive CPU's, making upgrading more expensive.

I just noticed AMD still makes their FCH/SB at 65nm. They'll be a lot smaller with 28nm tech.

 

[iceclock]

global something the name of the corp that manufactures them seems to have a problem with producing smaller dies.

 

[palladin9479]

Im with truegenious on this, the NB is way to slow and has been the same for some time now. I hope AMD and motherboard manufacturers optimize this on future AM3+ and FM2 boards.

[strike]HT and NB only controls the connection to the PCIe bus not the memory interface. Those benchmarks are showing something being copies over the HT into memory and back again so of course the HT interface will be the bottleneck. There are very few programs that would actually do this in practice and those relate to GPGPU type work.[/strike]

See below, mass confusion on the terminology being used. NB in reference to the CPU is not and has nothing to do with the motherboard chipset. CPU NB and L3 use's the HT ref clock as it's base clock rate, so overclocking the HT will overclock the CPU NB and L3 which results in higher memory performance.

Can't state this enough the physical link between the CPU and the NB is a completely different then the physical link between the CPU and the memory interface and has been for a long time.

 

[iceclock]

yep north bridge and south bridge has existed for a long time.

ht is amd term yes.

 

[palladin9479]

I just noticed AMD still makes their FCH/SB at 65nm. They'll be a lot smaller with 28nm tech.

Costing reasons mostly. The SB / Media Hub does so little performance work that there simply was never a reason to shrink it down. Chances are the on board sound chip is also made on a very mature process for the same reasons.

 

[iceclock]

i dont see a reason to integrate sound on the cpu die. seems waste of space.

integrated graphics and memory controller i get but sound hell no

well i figure if intel can shrink there die size whynot amd.

seems like a poor excuse.

 

[-Fran-]

Costing reasons mostly. The SB / Media Hub does so little performance work that there simply was never a reason to shrink it down. Chances are the on board sound chip is also made on a very mature process for the same reasons.

Well, it depends.

Remember when Intel came with the 8W Atom and the 965i chipset used was like 16w? Don't remember the exact numbers, but it was pretty dumb.

Same case can be applied here. For mobile targets, I'd say using a better process for the NB/SB could have benefits in the overall package. And that's where AMD wants to be now.

Cheers!

 

[iceclock]

what would u suggest yuka?

 

[palladin9479]

Well, it depends.

Remember when Intel came with the 8W Atom and the 965i chipset used was like 16w? Don't remember the exact numbers, but it was pretty dumb.

Same case can be applied here. For mobile targets, I'd say using a better process for the NB/SB could have benefits in the overall package. And that's where AMD wants to be now.

Cheers!

Oh I was referring to desktop solutions where an additional 8~16w is a rounding error. For mobile and low power solutions I completely agree with you though I would recommend a two chip solution. The system chip should integrate all sound / network / SATA / peripheral type connections on a low power chip and then have a different socket for the CPU that has an IMC / GPU / ect. I'd prefer to leave most of the system level stuff off the CPU for die space reasons, the more you pack on the less room you have for other stuff. Now if we're talking ultra-portable, stuff like tablets and nano-ITX design's then you have to pack everything you possibly can onto the CPU.

 

[palladin9479]

After doing some digging I think I know where people are getting confused.

http://sites.amd.com/us/Documents/AMD_FX_Performance_Tuning_Guide.pdf

Inside the K10 and BD architecture the IMC (AMD calls it NB) is tied to the HT base clock. So when your "overclocking HT" the additional memory performance your getting is from the IMC running faster not from the HT bus having a higher bandwidth. The L3 cache is also controlled by the IMC and uses the same base clock so your also overclocking the L3 cache access.

Hope this clears up the confusion. The HT link itself is not responsible for any performance increase and replacing it won't do anything for you, it's the memory controller inside the CPU that is actually being overclocked.

 

[iceclock]

but isnt putting everything on the same die gonna generate more heat.

 

[palladin9479]

but isnt putting everything on the same die gonna generate more heat.

Actually no. Less total system heat generation. Heat removal systems tend to work on a system level by venting out waste heat into the room and taking in ambient temperature air to replace it with. By sharing the same die you'll be removing some redundant connections and utilizing less overall power, its the less overall power part that lowers your heat production.

 

[truegenius]

I just noticed AMD still makes their FCH/SB at 65nm. They'll be a lot smaller with 28nm tech.

even intel's 6 and 7 series chipsets are at 65nm

I look forward to seeing what these SoC x86 chips can do. It's going to take a few more generations but having CPU/GPU/NB/SB all in 1 chip can have tremendous advantages.

yes for portables
but no for desktops (as it will cause less upgrading path)

Hope this clears up the confusion. The HT link itself is not responsible for any performance increase and replacing it won't do anything for you, it's the memory controller inside the CPU that is actually being overclocked.

we were refering to nb and not ht to clock higher
as i recommend higher nb to get more performance without overclocking the cpu (and ht at stock or at full ht3.0 speed)
(my system does not post at different ht and nb speed , that is why i am using nb and ht at same speed)

so is it nb or ht which should be overclocked to get more performance from l3 and memorh (imo nb) ?

if imc/nb's slow speed is causing performance loss (at least in benches) then they need to clock it higher (it was clocked at 1.8ghz for 65nm k10 (my athlon 7750, ddr2 only) but only boosted to 2ghz for 45nm k10 (ddr3))

 

[anxiousinfusion]

Actually no. Less total system heat generation. Heat removal systems tend to work on a system level by venting out waste heat into the room and taking in ambient temperature air to replace it with. By sharing the same die you'll be removing some redundant connections and utilizing less overall power, its the less overall power part that lowers your heat production.

This is what I was trying to get at with what would best be described as a unified heatsink.

 

[palladin9479]

Hope this clears up the confusion. The HT link itself is not responsible for any performance increase and replacing it won't do anything for you, it's the memory controller inside the CPU that is actually being overclocked.

we were refering to nb and not ht to clock higher
as i recommend higher nb to get more performance without overclocking the cpu (and ht at stock or at full ht3.0 speed)
(my system does not post at different ht and nb speed , that is why i am using nb and ht at same speed)

so is it nb or ht which should be overclocked to get more performance from l3 and memorh (imo nb) ?

if imc/nb's slow speed is causing performance loss (at least in benches) then they need to clock it higher (it was clocked at 1.8ghz for 65nm k10 (my athlon 7750, ddr2 only) but only boosted to 2ghz for 45nm k10 (ddr3))

The original debate was whether the AM3+ socket was "too old" and should be replaced by something "better". Posters mentioned that HT was too slow so I replied that it was perfectly fine and we're not even close to fully utilizing the bandwidth. (CPU to Motherboard chip). It was the definition of "NB" that got confused as AMD and BIOS's use it to reference the CPU IMC while we were using it to reference the 990FX chip.

HT / NB both use the same base clock (HT base) and can utilize different multipliers. Raising the HT multiplier shouldn't effect the IMC at all but raising the base clock will overclock both the IMC and the L3 cache. These are actually on a different voltage line then the rest of the CPU so you can play with it's voltage as well. AMD was rather conservative with the clocks on their IMC, I'm guessing they did it for stability reasons and to simplify design by using a single reference clock for all external CPU activities. This reminds me of the older CPU designs where the FSB clock would effect not only the CPU but the memory, AGP and PCI bus's. When I get a chance later I'll play with the NB clock on my 990FX + 8350.

As for "most performance" your HT link is going to be whatever your chipset supports and won't effect performance otherwise. Your NB on the other hand can give a big boost to performance though you might need to slowly raise the voltage on it. You may not be able to raise your NB clock my much and might have to resort to slight increase's in HT ref clock.

 

[iceclock]

interesting.

whats the name of the next socket?

 

[truegenius]

HT / NB both use the same base clock ( HT base)

means cpu baseclock or bus speed in cpuz screen !
even cpu and memory use same baseclock

This reminds me of the older CPU designs where the FSB clock would effect not only the CPU but the memory

my first pc was an athlon 7750 so no old days but it reminds me of lga1155 days
and reminds me of i3
why u intel no unlocked i3

i can sell my 1090t for reasonably priced unlocked i3 or quad k10 @32/28nm cpu @4-4.5ghz (not apu)

 

[palladin9479]

means cpu baseclock or bus speed in cpuz screen !
even cpu and memory use same baseclock

On economy boards maybe. The IMC is supposed to have a different base clock then the CPU itself though their both set to 200Mhz by default. The pdf I posted earlier is from AMD and explains the different settings and what they do.

 

[sarinaide]

[strike]HT and NB only controls the connection to the PCIe bus not the memory interface. Those benchmarks are showing something being copies over the HT into memory and back again so of course the HT interface will be the bottleneck. There are very few programs that would actually do this in practice and those relate to GPGPU type work.[/strike]

See below, mass confusion on the terminology being used. NB in reference to the CPU is not and has nothing to do with the motherboard chipset. CPU NB and L3 use's the HT ref clock as it's base clock rate, so overclocking the HT will overclock the CPU NB and L3 which results in higher memory performance.

Can't state this enough the physical link between the CPU and the NB is a completely different then the physical link between the CPU and the memory interface and has been for a long time.

We were refering to the IMC, though the point was the 2000mhz or nominally 1800mhz is to slow and overclocking the CPU/NB leads to instability as low as 2600mhz, these are factors needing to be looked at. Ironically the Richland APU has much better memory latency performance than the FX 8350 which is far and wide the best of all AMD performance chips. I am no doubt positive its due to the retweaked L2 being far faster than the FX L2 and L3 which still has rather high latency and generally to slow.

Will have to wait and see what Steamroller does to this, as we know from the roadmap charts AMD is focusing a lot on the IMC with this part so lets just see.

 

[Cazalan]

yes for portables
but no for desktops (as it will cause less upgrading path)

Not really a concern for me. Built 100+ systems and never upgraded a cpu without also upgrading the mobo. The only thing I bother upgrading is video cards and memory.

Intel says they're going to have a single chip Haswell as well. Probably not until Q4 though.

 

[noob2222]

This is what I was trying to get at with what would best be described as a unified heatsink.

This is only useful for low power systems. Copper can only dissipate soo much heat. Shrinking and adding more power to a single chip creates thermal density, the one thing copper can't change, its thermal dissipation. Look at sandy vs ivy bridge. Roughly 10 less watts, up to 20 degrees hotter with the stock fan, and maximum overclock reduced by 700 mhz under water cooling. This is the effect of thermal density. Packing more crap on the same die will only make it worse.

Everyone called me crazy when I suggested the mighty 14nm broadwell might not see DT speeds without some help with dissipating the hot spot.

 

[tonync_01]

Per the previous discussion about core use in games, it looks like Crysis 3 is heavily multi-threaded and the FX-8350 is the best cpu for the game aside from the 6-core intel chips. Impressive for a $200 cpu.

(in russian and takes a while to load: http://gamegpu.ru/action-/-fps-/-tps/crysis-3-test-gpu.html)

 

[truegenius]

This is only useful for low power systems. Copper can only dissipate soo much heat. Shrinking and adding more power to a single chip creates thermal density, the one thing copper can't change, its thermal dissipation. Look at sandy vs ivy bridge. Roughly 10 less watts, up to 20 degrees hotter with the stock fan, and maximum overclock reduced by 700 mhz under water cooling. This is the effect of thermal density. Packing more crap on the same die will only make it worse.

Everyone called me crazy when I suggested the mighty 14nm broadwell might not see DT speeds without some help with dissipating the hot spot.

i think that you want to say something like this

explained with example
die size of 3770k and 2700k are 160mm² and 216mm² with tdp of 77w and 95w respectively
so considering uniform heat generation from die
we can say that 3770k and 2700k have 481 and 440mw/mm²
so clearly, 3770 generates ~10% more heat per unit area
and it includes igpu too but rarely anyone use igpus of i7, also gpu of ivy is larger than sandy and i think that gpu is not the major source of this much heat
so if we calculate average tdp/mm² for cpu part only then ivy bridge clearly generates 10%+ heat per unit area (means higher thermal density)

so they have to lower this thermal density
and imo most effective way is by reducing voltage and speed

 

[noob2222]

i think that you want to say something like this

explained with example
die size of 3770k and 2700k are 160mm² and 216mm² with tdp of 77w and 95w respectively
so considering uniform heat generation from die
we can say that 3770k and 2700k have 481 and 440mw/mm²
so clearly, 3770 generates ~10% more heat per unit area
and it includes igpu too but rarely anyone use igpus of i7, also gpu of ivy is larger than sandy and i think that gpu is not the major source of this much heat
so if we calculate average tdp/mm² for cpu part only then ivy bridge clearly generates 10%+ heat per unit area (means higher thermal density)

so they have to lower this thermal density
and imo most effective way is by reducing voltage and speed

yep, haswell was designed to reduce power as much as possible, but the gains at desktop speeds were minimal, 84W to 87W for ivy. This is one reason why broadwell is rumored to be a soldered down ultra portable cpu. The solder connections will help push some heat to the motherboard itself., and they can get away with just selling low power cpus (up to 55 W last I saw) claiming 14nm is flawless.

as for the other part, most of the reviews posted heat numbers while running prime 95, so thats just the cpu cores pushing the heat.

as you stated, die shrinks are ultimately starting to fail to reduce power at the same rate as the area generating heat, extreme options are going to be required in the near future in order to maintain equal performance if shrinks are going to continue. For low power devices, its great. For pushing the limits, not so much.

This is also one reason AMD isn't rushing to push GF or TSMC to 14nm, AMD is even more power hungry, but their die is set up better, hot cpu cores are on the far corners, low power portion in the middle, allowing the silicon to be more thermal friendly. How far it can carry them is anyone's guess, have to wait for fabs.

Intel's design allows each cpu core to push heat to the adjuacent cpu core, the 2 in the middle run hottest. Heat travels in all directions, especially when in direct contact.

 

[gamerk316]

Actually no. Less total system heat generation. Heat removal systems tend to work on a system level by venting out waste heat into the room and taking in ambient temperature air to replace it with. By sharing the same die you'll be removing some redundant connections and utilizing less overall power, its the less overall power part that lowers your heat production.

Total system heat production, yes. But you're also putting all the components on a smaller total space, so the thermals will all be contained to a smaller area, making them harder to dissipate.

This is only useful for low power systems. Copper can only dissipate soo much heat. Shrinking and adding more power to a single chip creates thermal density, the one thing copper can't change, its thermal dissipation. Look at sandy vs ivy bridge. Roughly 10 less watts, up to 20 degrees hotter with the stock fan, and maximum overclock reduced by 700 mhz under water cooling. This is the effect of thermal density. Packing more crap on the same die will only make it worse.

I agree on this point. I *suspect* we'll see optical CPU's for a few years at some point prior to quantum computing taking off for that very reason. I consider thermals to be the main barrier on increasing CPU performance (as clocks are going to be basically flat).