AMD CPU speculation... and expert conjecture

[szatkus]

Also, 14nm is supposedly around twice as dense as 32nm at GloFo. So, 8 core Zen, given a Zen core is the same size as a Bulldozer module, would be the same size as an 8m/16c Piledriver with L3 on 14nm. They could probably ditch the L3 entirely and use HBM or something on an interposer and reduce the die size to actually be significantly smaller than a 32nm Orochi die.

Wait, what? SRAM is faster than HBM. Stacked RAM could be used as L4.

 

[esrever]

It still doesn't make much sense that they would release it Q3 along with the Zen parts. Why would Carrizo for desktop be so late? Couldn't they do Q4 2015? It just doesn't make much sense. Anyways Summit ridge will be APUs too in most likely cases, how does AMD expect to sell bristol ridge unless it was like half the price of summit ridge's cheapest part?

The roadmap doesn't make sense simply because you can't launch so many products in 1 quarter and expect them to be successful, it also makes the rest of your year barren. A more reasonable roadmap would be Q1 bristol, Q2 arctic island, Q3 bristol ridge, Q4 K12 ect, ect.

 

[szatkus]

It still doesn't make much sense that they would release it Q3 along with the Zen parts. Why would Carrizo for desktop be so late? Couldn't they do Q4 2015? It just doesn't make much sense. Anyways Summit ridge will be APUs too in most likely cases, how does AMD expect to sell bristol ridge unless it was like half the price of summit ridge's cheapest part?

I think that is the correct answer.

 

[etayorius]

http://www.kitguru.net/components/cpu/anton-shilov/amd-preps-bristol-ridge-apus-carrizo-for-desktops/

Carrizo without HDL?

OMG Q3 2016 at 28nm? they just love to do everything wrong...

 

[esrever]

It still doesn't make much sense that they would release it Q3 along with the Zen parts. Why would Carrizo for desktop be so late? Couldn't they do Q4 2015? It just doesn't make much sense. Anyways Summit ridge will be APUs too in most likely cases, how does AMD expect to sell bristol ridge unless it was like half the price of summit ridge's cheapest part?

I think that is the correct answer.

This would mean that summit ridge will probably be at least $200 for a 4c/8t if the current APU pricing is kept steady, which is likely the case with a new platform. That is pretty insane if that is the case since the budget Zen cpus will be competing directly with w/e high end piledriver are still left.

 

[szatkus]

http://www.kitguru.net/components/cpu/anton-shilov/amd-preps-bristol-ridge-apus-carrizo-for-desktops/

Carrizo without HDL?

OMG Q3 2016 at 28nm? they just love to do everything wrong...

Just think about it, Bristol will be a low end part. They don't need much more transistors because it don't have to be powerful. TDP also isn't the most important thing for desktops. 28nm is cheap. It will be the cheapest node for a long time.

http://www.techdesignforums.com/practice/files/2014/07/BEOL-costs.jpg
https://www.semiwiki.com/forum/attachments/content/attachments/11635d1406145622-sfdsoi2-jpg

It's just because Moore's law is dead.

https://www.youtube.com/watch?v=IBrEx-FINEI

 

[gamerk316]

Moore's "Law" was never a law, just an observation of technological advancement. Was bound to slow down as the technology matured. I'm sure a century ago you could apply it to yearly industrial output growth. Everything ends.

I'll say it again though: If we don't figure out a new way of doing things, we're going to hit peak computing within the next decade or two. We're basically running out of room to simply "add more transistors". And we've tuned single core's about as much as they can go. Really interested to see what (if?) we come up with.

 

[szatkus]

Moore's "Law" was never a law, just an observation of technological advancement. Was bound to slow down as the technology matured. I'm sure a century ago you could apply it to yearly industrial output growth. Everything ends.

I'll say it again though: If we don't figure out a new way of doing things, we're going to hit peak computing within the next decade or two. We're basically running out of room to simply "add more transistors". And we've tuned single core's about as much as they can go. Really interested to see what (if?) we come up with.

Hey, remember about graphene/silicene/whateverwillbenextbigthing. Maybe we will see gigahertz race again

 

[8350rocks]

You are all asking why a super simple, low cost, mature process core?

Embedded, AM1, entry level store fodder for $350-400, etc.

 

[juanrga]

Original source: http://www.sweclockers.com/nyhet/19954-amd-zen-forst-ut-i-summit-ridge-for-14-nanometer

Sorry, I don't like WCCF's interpretations :>

In this case WCCFTECH simply copied and pasted about word for word.

The Sweclockers report says lots of ordinary stuff: FM3 as replacement for FM2+, DDR4 as replacement for DDR3, 14nm (which was confirmed before), SMT (mentioned at K12 presentation),...

This leaves 95W TPD and the 8-core leak as the only new.

I still have my doubts about SMT, but let us assume the rest is accurate. Max of 95W TDP is current Kaveri top level and I don't consider that HEDT, but mainstream.

8-cores on 95W APU seems to confirm that the cores will be small and efficient rather than big and powerful.

Considering the TDP of Intel's top parts like 4770k, etc...95W on a 14nm process could very well equate to 125W TDP on 32nm process...

The 95W Zen APU on 14nm will be not competing against 22nm Haswell APUs but against the 95W Skylake APUs on 14nm.

All points to a revival of the old Bulldozer vs Sandy fight:

8 Zen cores will be faster than 4 Skylake cores on highly multithreaded integer code (at least 8 threads), but 8 Zen cores will be slower than 4 Skylake cores on FP code.

Once again AMD will try to hide their core performance deficit with moar cores. Luckily for AMD, Mantle/DX12 will hide partially the core deficit, but that will not help them beyond gaming.

Do you even have any conjecture as to why the core would behave like this? It seems to me that we would be seeing the opposite happen since AMD is going to dedicate more transistors to a single core than with how things are split in Bulldozer family. Also, if Zen supports AVX-512, which I expect it to, I find it highly unlikely the FPU will be as weak as you're claiming. Specifically because the FPU will be dedicated per core if CMT is gone and will not longer have to share resources with other decoders and such.

The only way I see FPU not significantly improving over Bulldozer family is if AMD does something like only give Zen a 128-bit FPU. And if they're going to increase their transistor budget per core like I specified earlier, they have no incentive to do that.

Also, 14nm is supposedly around twice as dense as 32nm at GloFo. So, 8 core Zen, given a Zen core is the same size as a Bulldozer module, would be the same size as an 8m/16c Piledriver with L3 on 14nm. They could probably ditch the L3 entirely and use HBM or something on an interposer and reduce the die size to actually be significantly smaller than a 32nm Orochi die.

Do not underestimate the jump from 32nm to 14nm. We haven't seen a jump like this ever, it's more than halving the advertised process size.

In short, you have ignored anything I have said during last weeks, including when I wrote I am waiting a 256-bit FPU for Zen. Nice!

 

[-Fran-]

So, to change the pace... I have a question. Who did the inner parts (or guts) of the MS glasses thingy?

Cheers!

 

[juanrga]

I will summarize my beliefs for Zen,

• 
  ■ Mini-core ~5mm2 on Samsung/Glofo 14FF node
  ■ ~40% higher IPC over Jaguar/Piledriver
  ■ 2x128 bit FP/SIMD
  ■ DDR4; HBM optional
  ■ 3.0--3.5GHz
  ■ CMP (no SMT)
  ■ Lego-like design

I will change/update when I have more info.

 

[Cazalan]

I care less about the core and more if they will put out a Zen sans iGPU.

In the flurry of rumors/leaks that is the latest one, so that 95W Zen may be just 8 CPU cores, in which case those would be rather large for the 14nm node. "Summit Ridge"

 

[esrever]

The only sen without gpu cores will probably be workstation/server cpus(if those even come out in 2016), there is no reason for them not to put a couple GCN CUs and integrate it into sen for desktop to sell to OEMs and Business and ect. Maybe you can get some with the GPU disabled like the athlon 860k but that would simply be a salvaged part for yields. I expect AMD to follow intel's current strategy for the desktop which includes IGP on all the cpus.

 

[gamerk316]

Moore's "Law" was never a law, just an observation of technological advancement. Was bound to slow down as the technology matured. I'm sure a century ago you could apply it to yearly industrial output growth. Everything ends.

I'll say it again though: If we don't figure out a new way of doing things, we're going to hit peak computing within the next decade or two. We're basically running out of room to simply "add more transistors". And we've tuned single core's about as much as they can go. Really interested to see what (if?) we come up with.

Hey, remember about graphene/silicene/whateverwillbenextbigthing. Maybe we will see gigahertz race again

Call me when they develop a bandgap that works, find a way to manufacture it at a decent cost, and find a way to implement it in chip level logic. But yes, we're looking at just about everything to find something with better properties then Silicon, since we can theoretically just ramp up clockspeed again to gain CPU power.

 

[Cazalan]

The only sen without gpu cores will probably be workstation/server cpus(if those even come out in 2016), there is no reason for them not to put a couple GCN CUs and integrate it into sen for desktop to sell to OEMs and Business and ect. Maybe you can get some with the GPU disabled like the athlon 860k but that would simply be a salvaged part for yields. I expect AMD to follow intel's current strategy for the desktop which includes IGP on all the cpus.

They don't really need a desktop strategy if the consumer space is going mobile. They just need workstation/server similar to the Xeon line. Maybe 2 CU just so they don't need a dGPU to boot. Anything more starts being a waste when you got dGPUs with HBM.

Salvaging parts by disabling the GPU is better than scrapping parts but since the iGPU is getting to be over half the die they can't make money that way.

 

[esrever]

The only sen without gpu cores will probably be workstation/server cpus(if those even come out in 2016), there is no reason for them not to put a couple GCN CUs and integrate it into sen for desktop to sell to OEMs and Business and ect. Maybe you can get some with the GPU disabled like the athlon 860k but that would simply be a salvaged part for yields. I expect AMD to follow intel's current strategy for the desktop which includes IGP on all the cpus.

They don't really need a desktop strategy if the consumer space is going mobile. They just need workstation/server similar to the Xeon line. Maybe 2 CU just so they don't need a dGPU to boot. Anything more starts being a waste when you got dGPUs with HBM.

Salvaging parts by disabling the GPU is better than scrapping parts but since the iGPU is getting to be over half the die they can't make money that way.

I doubt they will use half the die for GPU but who knows. The cores are tiny compare to the L3 cache in modern CPUs and they could just forgo that and put the GPU logic in there. I am thinking probably 4CU would be fairly competitive with intel's solution given memory constraints. I wonder if AMD will make it HSA compatible at that point because it would be hard to sell HSA if their low end APU beat their high end CPUs in HSA enabled applications.

 

[Cazalan]

So, to change the pace... I have a question. Who did the inner parts (or guts) of the MS glasses thingy?

Cheers!

Partly Intel Cherry Trail and another unknown HPU (Holographic Processing Unit). From the same guy that did Kinect.

http://www.pcworld.com/article/2874352/microsofts-hololens-uses-unreleased-intel-atom-chip.html

 

[Cazalan]

I doubt they will use half the die for GPU but who knows. The cores are tiny compare to the L3 cache in modern CPUs and they could just forgo that and put the GPU logic in there. I am thinking probably 4CU would be fairly competitive with intel's solution given memory constraints. I wonder if AMD will make it HSA compatible at that point because it would be hard to sell HSA if their low end APU beat their high end CPUs in HSA enabled applications.

In the consumer space the iGPU is going to go well past 50%. Just look at the latest Broadwell using nearly 66% for the iGPU. And Skylake is supposedly going to add 50% more iGPU again.

 

[truegenius]

I will summarize my beliefs for Zen,

• 
  ■ Mini-core ~5mm2 on Samsung/Glofo 14FF node
  ■ ~40% higher IPC over Jaguar/Piledriver
  ■ 2x128 bit FP/SIMD
  ■ DDR4; HBM optional
  ■ 3.0--3.5GHz
  ■ CMP (no SMT)
  ■ Lego-like design

I will change/update when I have more info.

there is dayinight gap between jaguar and piledriver ipc

 

[cdrkf]

I will summarize my beliefs for Zen,

• 
  ■ Mini-core ~5mm2 on Samsung/Glofo 14FF node
  ■ ~40% higher IPC over Jaguar/Piledriver
  ■ 2x128 bit FP/SIMD
  ■ DDR4; HBM optional
  ■ 3.0--3.5GHz
  ■ CMP (no SMT)
  ■ Lego-like design

I will change/update when I have more info.

there is dayinight gap between jaguar and piledriver ipc

Uhm no actually, they are pretty much equal from the review's I read (I'll have to dig through them though). Piledriver isn't as bad as people make out in terms of IPC, its failing is perf / w more than anything else (and is where Jaguar shines). Remember Jaguar only has 2 eu in it's pipeline compared to 4 in a Piledriver core so the fact it matches it in IPC is impressive. Jaguar's issue though is it doesn't scale above about 2ghz.

 

[cemerian]

Moore's "Law" was never a law, just an observation of technological advancement. Was bound to slow down as the technology matured. I'm sure a century ago you could apply it to yearly industrial output growth. Everything ends.

I'll say it again though: If we don't figure out a new way of doing things, we're going to hit peak computing within the next decade or two. We're basically running out of room to simply "add more transistors". And we've tuned single core's about as much as they can go. Really interested to see what (if?) we come up with.

the answer is quantum computing, we already have Dwaves adiabatic quantum processors, now we just need for them to figure out how to make a chip that is meant for more than one type of calculations, thats where its going very slow, while dwave already has 1024qubit chips they are useless for most of the markets, but are very useful for some others, everyone can agree that is the best way forward, the only question how long, also software will be a problem for those chips, but once it kicks in...

 

[gamerk316]

Moore's "Law" was never a law, just an observation of technological advancement. Was bound to slow down as the technology matured. I'm sure a century ago you could apply it to yearly industrial output growth. Everything ends.

I'll say it again though: If we don't figure out a new way of doing things, we're going to hit peak computing within the next decade or two. We're basically running out of room to simply "add more transistors". And we've tuned single core's about as much as they can go. Really interested to see what (if?) we come up with.

the answer is quantum computing, we already have Dwaves adiabatic quantum processors, now we just need for them to figure out how to make a chip that is meant for more than one type of calculations, thats where its going very slow, while dwave already has 1024qubit chips they are useless for most of the markets, but are very useful for some others, everyone can agree that is the best way forward, the only question how long, also software will be a problem for those chips, but once it kicks in...

DWAVE has something that appears to have quantum effects, but the jury is still out on whether they have a quantum computer or not. In any case, a specialized processor is a lot simpler to make then a general purpose CPU.

Me? I'm still stuck on the "something between 0 and 1" concept. SW engineers are going to have nightmares when these things become mainstream.

 

[truegenius]

I will summarize my beliefs for Zen,

• 
  ■ Mini-core ~5mm2 on Samsung/Glofo 14FF node
  ■ ~40% higher IPC over Jaguar/Piledriver
  ■ 2x128 bit FP/SIMD
  ■ DDR4; HBM optional
  ■ 3.0--3.5GHz
  ■ CMP (no SMT)
  ■ Lego-like design

I will change/update when I have more info.

there is dayinight gap between jaguar and piledriver ipc

Uhm no actually, they are pretty much equal from the review's I read (I'll have to dig through them though). Piledriver isn't as bad as people make out in terms of IPC, its failing is perf / w more than anything else (and is where Jaguar shines). Remember Jaguar only has 2 eu in it's pipeline compared to 4 in a Piledriver core so the fact it matches it in IPC is impressive. Jaguar's issue though is it doesn't scale above about 2ghz.

based on my read and calculations to level the clock gain, core counts and modular performance loss ( mostly cinebench, video conversion, 7zip compression )
depending on benchmark, on an average jaguar is 10-20% slower than piledriver in per clock per core performance, which is still considerable difference

 

[juanrga]

Maybe it is worth mentioning Keller's words about Zen:

We know how to do small dense cores (Cat) and we know how to do high frequency (Bulldozer)... what I've asked the team to do is take the DNA from both