blackkstar
Honorable
juanrga :
blackkstar :
The discussion about AMD losing things by going bulk was exaggerated, but it is true. The general consensus on Kaveri desktop is that the IPC gains were wiped out by the fact that Kaveri can't clock as high. I don't see too many architectural changes that would have caused that. It seems far more likely to be related to the process instead.
Yeah, there are good OCing Kaveri's out there. But the fact remains that at the end of the day we had to see a stock clockspeed reduction thanks to going bulk and that the point of diminishing returns when raising TDP is much lower.
AMD lost a lot going from Richland to Kaveri in terms of clock speeds. It wasn't some catastrophic unable to break 3ghz type of event, but it was enough to hurt overall CPU performance.
Yeah, there are good OCing Kaveri's out there. But the fact remains that at the end of the day we had to see a stock clockspeed reduction thanks to going bulk and that the point of diminishing returns when raising TDP is much lower.
AMD lost a lot going from Richland to Kaveri in terms of clock speeds. It wasn't some catastrophic unable to break 3ghz type of event, but it was enough to hurt overall CPU performance.
Evidently part of the IPC increment introduced by Steamroller architectural improvements was dropped by the lower base clock. Nobody is negating that! What is being discussed here is why AMD underclocked Kaveri.
We know that Kaveri average OC on air is 4.5GHz. We have seen Kaveri benchmarked @4.7GHz:
http://www.hardcoreware.net/kaveri-7850k-overclocked-benchmarks/
Anand showed that Kaveri can be OC up to ~4.2GHz without changing the voltage (1.25V) and with almost same power consumption 147W vs 148W

We also know that early talks and docs from AMD mentioned explicitly that Kaveri was a 100W APU originally.
Thus the question is why did AMD downrated Kaveri to 95W and reduced the base frequency from the expected 4.0GHz (check my BSN article) to final 3.7GHz? Why did AMD do that when Kaveri can hit 4.5/4.7GHz on air?
This is the million dollar question that nobody is answering!
This is a problem with bulk.
Look at Intel finFET on bulk. Everyone ran around going "it's all due to the TIM! Haswell could clock just as high as FX and then FX is FINISHED!"
So Intel released Devil's Canyon and everyone found out that the chips hit a massive voltage wall regardless of temps and fell on its face. The same thing that happens to Kaveri on bulk.
Bulk sucks, it doesn't scale with voltage. Look at TSMC too. Tahiti ships at what, a 1.17 core voltage.
Now look at PD-SOI 32nm. It ships about 1.32v stock for FX CPU series yet it can do 1.55v no issue. That's a 17% increase in voltage.
Now look at what happens if you apply 17% voltage increase to TSMC 28nm bulk. You end up with 1.37v. No one in their right mind does that, because the chip stops scaling. My 7970 on water stops scaling with voltage around 1.25v and then I can't do anything else with the chip. It runs all day long at 100% load at 60c.
Meanwhile on PD-SOI, I can bump voltage up to 1.7v (nearly 30% increase in voltage!!), hit higher clocks than I normally could at 1.6v, and then still have a system stable enough with all cores active to putz around Windows.
Show me a bulk product that can live through a 30% voltage increase and still be usable. I'm not talking LN2 runs and then throw the chip away. I'm talking someone doing what a lot of people would consider stupid and living to tell the tale. I consider myself one of those people. I have constantly ran this thing at 1.6v+ for more than a year. And it spends a lot of time in Gentoo, compiled to use every instruction available, at 100% load baking textures and rendering.
If you were right about bulk being so great, Devi's Canyon wouldn't be a massive disappointment. SOI is vastly superior for raw performance when you compare voltage headroom between normal and what the chip can handle without degrading massively.
Also, do you have a source that AMD is abandoning CMT? All I can remember is one article that claims that, but if you read the article, it says nothing about abandoning CMT. It just says a new design. Basically it was a clickbait article.
CMT is like Hyperthreading. You are basically looking at Pentium 4 and going "wow, Hyperthreading sucks, I hope Intel gets rid of it!" And we all know Intel fixed Hyperthreading (for the most part) and their cores. And now Hyperthreading is a premium feature on premium chips. Intel thinks Hyperthreading is so good they want you to pay a lot of extra money up upgrade from 4670k to 4790k.
My point is that there's a lot of things that are wrong with the Bulldozer family, but you're basically isolating one that you dont' agree with and pinning the blame on CMT entirely.
The thing about you saying that "CMT is completely broken" is that you can actually disable CMT on FX chips if your motherboard supports it, by running one core per module. Then, your Piledriver has its own integer units, full access to FPU, full decoder, etc. Yet it doesn't magically blow past Intel when you do that. Do you know why? Why is it when you remove the CMT part of FX chips from the equation that they still lag behind? Do you still think AMD's performance problems all come from CMT?
You just cherry pick information that fits your goals. You got blown out of the water by ARM replacing everything so now you're moving onto the "once AMD abandons CMT they will be so much better!" thing beating the same few sources you've found to death and ignoring every other piece of evidence in existence.
AMD could come back and do extreme CMT with 4 threads sharing a module or something. And it might be awesome (Power with more than two SMT threads per physical core is serious business). You need to realize that just because something has a characteristic that stands out and that thing is not so great, that it doesn't mean that feature that stands out is the cause of the problems. For all you know if Intel used CMT on Haswell, we'd see 8 core consumer Haswells that cost $300, that were just as good as Haswell is now.