none12345 :
Im also wondering what the geometry of the 8 core chiplet is....did they recycle the 2x4 ccx config, or is it something new.
One of the main reason CCXes only had two cores was distance between cores and caches increasing latency. By making the cores and caches physically less than half as large, AMD should be able to cram twice as many cores around a single shared cache without having to increase latency by much, so I'd expect chiplets to have eight cores sharing a single L3 cache.
Also, you probably don't want to layer chiplet fabric on top of chipset fabric on top of motherboard fabric, so I suspect chiplets may be using a lower latency bare-metal interface to let the chipset take care of application-specific fabric magic or possibly bypass it altogether for single-socket CPUs.