AMD Piledriver rumours ... and expert conjecture

[Reynod]

We have had several requests for a sticky on AMD's yet to be released Piledriver architecture ... so here it is.

I want to make a few things clear though.

Post a question relevant to the topic, or information about the topic, or it will be deleted.

Post any negative personal comments about another user ... and they will be deleted.

Post flame baiting comments about the blue, red and green team and they will be deleted.

Enjoy ...

 

[AbdullahG]

Thats old news actually
Dont mean to rain on your parade heheh
I guess theres alot out there thats not in here, maybe someone can change that?

Tom's just posted an article about it not supporting PCI-E 3.0
Talk about being somewhat behind...

 

[JAYDEEJOHN]

Im thinking its the after effects of BD
What were getting is real for the most part, everything and everywhere considered
So, dont blame Toms, or anyone else for that matter, its a delicate situation at this point

 

[AbdullahG]

Im thinking its the after effects of BD
What were getting is real for the most part, everything and everywhere considered
So, dont blame Toms, or anyone else for that matter, its a delicate situation at this point

I'm not saying Tom's is behind. I am saying AMD is. Intel already has PCI-E 3.0 support for Ivy and their MoBos.

 

[purple stain]

Is their still not official release date for this?

Q1 2012 is only 3 months away.

 

[amdfangirl]

If I got laid off (unfairly), I would leak everything I knew to a news website.

For a price of course.

But I would never work for a CPU company.

That requires maths... and physics.

 

[Chad Boga]

If I got laid off (unfairly), I would leak everything I knew to a news website.

For a price of course.

There is the issue of one's professional reputation to consider, especially how a future potential employer would view such conduct.

 

[jimmysmitty]

I got a very short answer from the guy and in all honesty i do not want to spoil anyones waiting game by answering it.

I am in a bad position tbh.

I asked is piledriver going to be anything to look forward to...

Thing is, we were told by many people BD was something to look forward too.

I honestly wont hold my breath on anything. Benchmarks never lie. People who work for the company in certain positions or are die hard fans always do.

Remember, Phenom was smoother than Core 2 Quad, thats why it was still better.

I'm not saying Tom's is behind. I am saying AMD is. Intel already has PCI-E 3.0 support for Ivy and their MoBos.

And in SB-E. That Asus X79 chipset mobo looks smexy.

 

[Chad Boga]

Thing is, we were told by many people BD was something to look forward too.

I honestly wont hold my breath on anything. Benchmarks never lie. People who work for the company in certain positions or are die hard fans always do.

According to Charlie D, Trinity's lead designer and many in his team have been let go.

Now what do you think this portends for how Trinity is likely to turn out?

 

[jimmysmitty]

According to Charlie D, Trinity's lead designer and many in his team have been let go.

Now what do you think this portends for how Trinity is likely to turn out?

Probably not very well if true. Also if its true that a 2.9GHz Llano is just as good performance wise as a 3.8GHz Trinity, then that would also point towards a less than stellar CPU and possibly show us what PD may be near in performance.

 

[amdfangirl]

Perhaps it's just GPU focused? Maybe the CPU takes up a small area only?

 

[amdfangirl]

Heh, even the best of us get fooled.

I get fooled by 'offical' corporate promises. Either way we get fooled 😀.

 

[noob2222]

You're assuming 100% scaling to the first physical 4 cores, which is almost assuredly not the case.

You have to figure out what 100% is supposed to be to get the actual %, you can't just say "well, this cpu is scaling is x amount while 1 core = y"

When your figures don't = 100%, the difference is the scaling, without knowing what 100% would be, there is no scaling factor. IT HAS NOTHING TO DO WITH ASSUMING ANYTHING, its a given factor that you have to have to find any actual results. Percentage is a comparison of one factor to another.

You can't have a scaling % with just 1 figure, so your comparison has to be comparing actuals to a perfect world situation, ie 100%.

Compare the 2500K - no HT - with its scores bumped up by 34/33 to get equal clocks. That yields an R10 score for 4 cores of 20,999. So in that case HT yields 22875/20999 = a whopping 9% positive gain

Lol. I did that in the last message and you gave some story about comparing apples to apples and not imaginary cores ... Its still not the 30% intel claims.

No, in order to put AMD's CMT and Intel's SMT on an equal basis, I looked at how they scale up, ignoring 'real', 'almost real' and 'fake' core differences by comparing a single thread bench to an 8-thread bench for each CPU. There is no Cinebench review that I'm aware of comparing 4 BD cores to 8, which is why I did it that way - apples to apples.

Yes HT yields X% compared to no HT. But your arguement was trying to compare scaling purely on BD vs 2600k, when proven wrong there, now your changing the story, even though I have already brought that one up. 9% boost is not 30% as Intel claims and much farther off than AMD's claim of 80% while achieving 67-73%

 

[Reynod]

I don't know if a mod can trace where the guy actually lives either.
But he said he is from cali which i presume is california...
My post was meant for another thread anyhow.

Do not shoot the messanger!
The guy seemed legit after he came out of his immature shell.

I call BS on the entire COD session you had with him.

1. You have no proof.
2. No way would John put his career (house and kids future) on the line by chatting with a gamer on-line regarding AMD's current and future lineup ...
3. Posting this rubbish around our forums is not appropriate and potentially slanderous.
4. John may have a joke (about stacking his bike usually) but he is not immature.

I am removing all references bar this post.

Cheers.

 

[gamerk316]

Probably not very well if true. Also if its true that a 2.9GHz Llano is just as good performance wise as a 3.8GHz Trinity, then that would also point towards a less than stellar CPU and possibly show us what PD may be near in performance.

I'll say it again: The entire BD arch is a flawed design, and thus will always offer less performance at a given clock speed then the pervious arch. Those numbers basically mirror what we've seen with BD v PII, so I can't say I'm surprised...

 

[-Fran-]

I'll say it again: The entire BD arch is a flawed design, and thus will always offer less performance at a given clock speed then the pervious arch. Those numbers basically mirror what we've seen with BD v PII, so I can't say I'm surprised...

In all fairness, "flawed" is a bit harsh. I'd rather call it "different" (in a bad way, though), because it was intended to behave like it did (cept some bugs it might have).

They had scalability for "cores" in mind, not IPC; at least, that's the impression I've gotten over the time. If you look at what they did regarding "modules", I'd say it's a good idea. Not an earth shattering break through, but an improvement to Intel's idea of SMT behind HT.

Having issues with manufacturing at GF is another thing on its own. They no longer control (AFAIK) production there, so they can only depend on GF's capability to produce "in time, in quality and in budget".

It's sad that BD didn't perform like we all hoped for, but it's not like the "design" is flawed. It's a different spin of looking into computation prowess for a CPU (yes, P4-like). In the mid term (hopefully PD) we'll see significant improvements I'm sure: mature 32nm process, tweaked uarch and bug fixes; which, btw, L1 seems to have a thing going on: http://www.phoronix.com/scan.php?page=article&item=amd_bulldozer_aliasing&num=1.

Maybe it was a Linux kernel thing, but still curious.

Cheers!

 

[yannifb]

What NDA are you talking about? NDA's are formal agreements that need to be signed. I dont think talking about PD over COD puts you under an NDA.

 

[metallifux]

im spewing i missed the info, perhaps you could re-up it without anyones names

 

[phatbuddha79]

I call BS on the entire COD session you had with him.

1. You have no proof.
2. No way would John put his career (house and kids future) on the line by chatting with a gamer on-line regarding AMD's current and future lineup ...
3. Posting this rubbish around our forums is not appropriate and potentially slanderous.
4. John may have a joke (about stacking his bike usually) but he is not immature.

I am removing all references bar this post.

Cheers.

I do not believe 384-bit has any reason to lie BUT I do think the guy he was playing with is not JF though. He divulged too much about company details, it would risk his career for maybe even future employers.

 

[gamerk316]

In all fairness, "flawed" is a bit harsh. I'd rather call it "different" (in a bad way, though), because it was intended to behave like it did (cept some bugs it might have).

They had scalability for "cores" in mind, not IPC; at least, that's the impression I've gotten over the time. If you look at what they did regarding "modules", I'd say it's a good idea. Not an earth shattering break through, but an improvement to Intel's idea of SMT behind HT.

Having issues with manufacturing at GF is another thing on its own. They no longer control (AFAIK) production there, so they can only depend on GF's capability to produce "in time, in quality and in budget".

It's sad that BD didn't perform like we all hoped for, but it's not like the "design" is flawed. It's a different spin of looking into computation prowess for a CPU (yes, P4-like). In the mid term (hopefully PD) we'll see significant improvements I'm sure: mature 32nm process, tweaked uarch and bug fixes; which, btw, L1 seems to have a thing going on: http://www.phoronix.com/scan.php?page=article&item=amd_bulldozer_aliasing&num=1.

Maybe it was a Linux kernel thing, but still curious.

Cheers!

Its not the module approach I disagree with, it was the approach for clocks over IPC. The reason being, it will be VERY hard to significantly increase clocks going forward simply due to power draw, and BD's design approach can not be significantly changed to increase IPC. As such, there is very little room for actual improvement going forward.

If BD was ~4.2GHz at stock, AND could OC well, AND AMD sold it at the same prices it is now, then it would have been what some were proclaiming it was. Fact is, BD never reached the clocks it needed to really be competitive, and because of its design, I doubt it ever will.

AMD made a lot of other odd design decisions, as I've explained before [Int over FP, etc]. I call BD's entire design busted, with little to no hope for improvement. AMD should ditch the arch after PD and start over from scratch.

 

[fazers_on_stun]

I would just like to say thanks to you all for considering my position with what i posted.
Even if he was not real, i don't know that just as the next guy does'nt.
But the info i had from him seemed legit to me.
However i will just sit and wait and see what becomes of piledriver.

Next time ping his IP address and then look up where he's connected.

 

[-Fran-]

Its not the module approach I disagree with, it was the approach for clocks over IPC. The reason being, it will be VERY hard to significantly increase clocks going forward simply due to power draw, and BD's design approach can not be significantly changed to increase IPC. As such, there is very little room for actual improvement going forward.

If BD was ~4.2GHz at stock, AND could OC well, AND AMD sold it at the same prices it is now, then it would have been what some were proclaiming it was. Fact is, BD never reached the clocks it needed to really be competitive, and because of its design, I doubt it ever will.

AMD made a lot of other odd design decisions, as I've explained before [Int over FP, etc]. I call BD's entire design busted, with little to no hope for improvement. AMD should ditch the arch after PD and start over from scratch.

Yeah I get it and agree with you fully, but don't say "flawed design"; it sounds wrong (unfair even) xD

I do have some thoughts about those beefed up int units though: APU road. GPUs are very good at FP ops, so it would only be natural down the road to get something there. I think this came from the BD thread at some point, but don't remember who brought it in.

And don't forget the process. There's a lot of blame in there. The first 45nm parts were, in a few words, utter crap. I bet this will be the same iterations Phenom had, but maybe a mixed bag into the APU strategy. That would be very interesting.

Cheers!

 

[fazers_on_stun]

You have to figure out what 100% is supposed to be to get the actual %, you can't just say "well, this cpu is scaling is x amount while 1 core = y"

When your figures don't = 100%, the difference is the scaling, without knowing what 100% would be, there is no scaling factor. IT HAS NOTHING TO DO WITH ASSUMING ANYTHING, its a given factor that you have to have to find any actual results. Percentage is a comparison of one factor to another.

You can't have a scaling % with just 1 figure, so your comparison has to be comparing actuals to a perfect world situation, ie 100%.

I think just about everybody here knows what scaling is already, but thanks for the elementary refresher.

Compare the 2500K - no HT - with its scores bumped up by 34/33 to get equal clocks. That yields an R10 score for 4 cores of 20,999. So in that case HT yields 22875/20999 = a whopping 9% positive gain

Lol. I did that in the last message and you gave some story about comparing apples to apples and not imaginary cores ... Its still not the 30% intel claims.

No you didn't. Go read your post again. You said "Intel single core cinebench 10 = 5991, *4= 23964. Actual = 22875. thats below 100%". That's a straight multiplication by 4, which is scaling by 100% per core. What I did - using the 2500K with no HT - is more accurate.

No, in order to put AMD's CMT and Intel's SMT on an equal basis, I looked at how they scale up, ignoring 'real', 'almost real' and 'fake' core differences by comparing a single thread bench to an 8-thread bench for each CPU. There is no Cinebench review that I'm aware of comparing 4 BD cores to 8, which is why I did it that way - apples to apples.

Yes HT yields X% compared to no HT. But your arguement was trying to compare scaling purely on BD vs 2600k, when proven wrong there, now your changing the story, even though I have already brought that one up. 9% boost is not 30% as Intel claims and much farther off than AMD's claim of 80% while achieving 67-73%

Sigh. Let me reiterate:

(1) Intel claims up to 30% with light thread multithreaded apps ("light" meaning maybe 30% free clock cycles in that thread, where nothing is happening). Intel decided to put those wasted clocks to use by switching to another thread. If there are no or few free clock cycles in a - you guessed it - heavy thread, then HT is a waste of time as switching to another thread merely slows down the first one by denying it resources. Not so hard to understand..

(2) While there is a way to compare 4 threads to 8 threads for the 2600K (by using the 2500K as I did above), there is no way to measure BD's CMT performance on 4 cores vs 8 because AFAIK nobody has done such a comparison yet. When they do, then we can compare apples to apples by going from 4 ->8 threads using HT vs. 4 -> 8 cores using CMT.

(3) So what I did was ignore the 4-thread/4-core data point as there isn't a 4-core data point yet, that I know about anyway, and just compare 1 --> 8 threads vs. 1 --> 8 cores for admittedly a quick & dirty comparison. I figured most people would understand that - they already know that HT is not a 'real core' - no need to belabor the obvious. Perhaps I was incorrect..

(4) Just as an FYI, if you multiply BD's single thread CB R10 score of 3938 by 4 (100% scaling to 4 cores), which equals 15758, then divide that by the 8-core number 20254, that comes out as a scaling of 28.5% - also far below AMD's claimed max of "up to 80%".

I hope this settles the matter - otherwise I'll just assume you're still smarting over that die-size boo-boo and looking to pick a fight..

 

[noob2222]

I think just about everybody here knows what scaling is already, but thanks for the elementary refresher.

Compare the 2500K - no HT - with its scores bumped up by 34/33 to get equal clocks. That yields an R10 score for 4 cores of 20,999. So in that case HT yields 22875/20999 = a whopping 9% positive gain

Lol. I did that in the last message and you gave some story about comparing apples to apples and not imaginary cores ... Its still not the 30% intel claims.

No you didn't. Go read your post again. You said "Intel single core cinebench 10 = 5991, *4= 23964. Actual = 22875. thats below 100%". That's a straight multiplication by 4, which is scaling by 100% per core. What I did - using the 2500K with no HT - is more accurate.

Go back and read page 4 again. "normalize to 1ghz, with HT= 6727, without = 6176. Thats a difference of 8% not 56% as you claim." <--- same thing as 34/33 (3.4/3.3)

No, in order to put AMD's CMT and Intel's SMT on an equal basis, I looked at how they scale up, ignoring 'real', 'almost real' and 'fake' core differences by comparing a single thread bench to an 8-thread bench for each CPU. There is no Cinebench review that I'm aware of comparing 4 BD cores to 8, which is why I did it that way - apples to apples.

Yes HT yields X% compared to no HT. But your arguement was trying to compare scaling purely on BD vs 2600k, when proven wrong there, now your changing the story, even though I have already brought that one up. 9% boost is not 30% as Intel claims and much farther off than AMD's claim of 80% while achieving 67-73%

Sigh. Let me reiterate:

(1) Intel claims up to 30% with light thread multithreaded apps ("light" meaning maybe 30% free clock cycles in that thread, where nothing is happening). Intel decided to put those wasted clocks to use by switching to another thread. If there are no or few free clock cycles in a - you guessed it - heavy thread, then HT is a waste of time as switching to another thread merely slows down the first one by denying it resources. Not so hard to understand..

(2) While there is a way to compare 4 threads to 8 threads for the 2600K (by using the 2500K as I did above), there is no way to measure BD's CMT performance on 4 cores vs 8 because AFAIK nobody has done such a comparison yet. When they do, then we can compare apples to apples by going from 4 ->8 threads using HT vs. 4 -> 8 cores using CMT.

(3) So what I did was ignore the 4-thread/4-core data point as there isn't a 4-core data point yet, that I know about anyway, and just compare 1 --> 8 threads vs. 1 --> 8 cores for admittedly a quick & dirty comparison. I figured most people would understand that - they already know that HT is not a 'real core' - no need to belabor the obvious. Perhaps I was incorrect..

(4) Just as an FYI, if you multiply BD's single thread CB R10 score of 3938 by 4 (100% scaling to 4 cores), which equals 15758, then divide that by the 8-core number 20254, that comes out as a scaling of 28.5% - also far below AMD's claimed max of "up to 80%".

I hope this settles the matter - otherwise I'll just assume you're still smarting over that die-size boo-boo and looking to pick a fight..

I love incorrect math figures and changing stories.

1) wich is why compared to modular architecture, HT sucks, BD doesn't care how "lightly threaded" it is.

2,3, and 4) remember this?

On a per-core basis, that amounts to 67% to 73% . For SB's HT, which Intel alleges offers up to 30% improvement with 'light' multithreading, R10 shows 48% improvement and R11.5 shows a 56% improvement per thread.

See page 3 for a story change.

Thats funny how bd now is 28% instead of 67% Then again, mis-interpreting "module is 80% of a dual core" is not the same statement as "HT offers 30% improvement" so using the same math does not yield accurate statements until you make the statements = each other.

And didn't you just say I was wrong for assuming 100% scaling, then go and do the same thing for your calculations here? Lets see where Intel is with that same figure.

Intel single core cinebench 10 = 5991, *4= 23964. Actual = 22875. = -5%
multiply BD's single thread CB R10 score of 3938 by 4 (100% scaling to 4 cores), which equals 15758, then divide that by the 8-core number 20254, that comes out as a scaling of 28.5%

So AMD scales using your math and an equal comparison 28% (1.28-1.00) to Intel's -5%(0.95-1.00)

 

[JAYDEEJOHN]

OK, lets not get all tight around here
http://www.facebook.com/austinbike

Now, its a simple mistake, and trying to keep facts in this thread is the point, not putting someone down, attacking or whatever.
AFD got it right, it happens, and lets keep moving on, and thanks everyone for staying on point

 

[dogman_1234]

^ stalker...