AMD Piledriver rumours ... and expert conjecture

Page 253 - Seeking answers? Join the Tom's Hardware community: where nearly two million members share solutions and discuss the latest tech.
Status
Not open for further replies.
We have had several requests for a sticky on AMD's yet to be released Piledriver architecture ... so here it is.

I want to make a few things clear though.

Post a question relevant to the topic, or information about the topic, or it will be deleted.

Post any negative personal comments about another user ... and they will be deleted.

Post flame baiting comments about the blue, red and green team and they will be deleted.

Enjoy ...
 


Most of these threads are integrated graphics and solid HTPC builds on lowest cost. The llano ticks the blocks, Trinity makes it less a conundrum. Intel has trown its top end mainstream chips with iGPU's at llano and didn't succeed, Trinity moves the bar just that little further.
 

looks like OBR lost another bet.

Interesting note is that on AM3+, Steamroller will have all of its gpu cores available for the processor without fighting for graphic output.
 


I am not pleased about this, AM3+ needs a massive overhaul of features, unless motherboards are revised and refreshed with PCI 3.0, More SATA, Lucid, Higher DRAM SPD, more Phase VRM's etc then its just going to make it a bore.

AMD need to lose this Northbridge nonsense now, Intel by integrating the memory controller got far more performance and less latency from RAM and opened space on the motherboard, AMD needs to follow suit.


 

they may change the chipset, just not the socket.
 
I am big into features, and AMD boards need more. Gigabyte needs to introduce I high end motherboard, Asrock can improve the Fatality (esp bios) MSI need to improve quality while ASUS have the mecca of all AMD boards feature wise in the Crosshair which is easily the stand out board.
 

good news for am3+ fans, sorta bad news in the long run. for example, if amd is keen on keeping am3 for steamroller and even evcavator (just saying) that means no upgraded imc or ddr4 support with sr. existing imc is bottleneck for the apus. :pfff:

amd can port their enduro tech on desktop instead of relying on lucid.. i don't know if they've done it already. if amd is keeping am3+ around, amd could allow pcie 3.0 support with an upgraded chipset. although pcie 3.0 support on the apu platform is another story...
imho amd does not need seperate apu and cpu sockets. trinity's a85 chipset pcie lane splitting (16 gen 2.0 lanes) into x8+x8 modes. it'd be interesting to see how a10 apus run two gaming gfx cards like 7850 in cfx.
 


I'm not sure where you're getting your information from but AMD has had an integrated on die memory controller in all of its CPU architechtures since K8 in 2004. AMD actually beat intel to the punch in this regard and is part of the reason the Pentium 4 had such lacklustre performance compared to the competition at the time.
*Added link in edit: http://en.wikipedia.org/wiki/AMD_K8
 


It still communicates with the NB controller, there is latency between CPU IMC and NB controller, this compared to Intels IMC which basically removed a NB from all Intel boards since Sandy, compare prior Intel memory performance and latencies to concurrent chips and its off the chart. AMD needs to follow suit to achieve better memory performance.
 


Are any of these AM3+ based CPU's going to have an IGP? :heink:
 


That is not infact how the memory heirarchy subsystem works in AM3+ chipsets. It would be silly to integrate the MC but then still have the added latency of communicating through the northbridge. If you check out this basic block diagram on the 990fx chipset, you'll notice that the AM3+ socket directly communicates with main memory using the on die MC without having to go through the north bridge.
http://www.tomshardware.com/gallery/990fx-block,0101-294069-0-2-3-1-jpg-.html

I will agree however that integerating the rest of the NB is the next logical step for reduced power consumption and other benefits.
 


Have the IMC control frequency between RAM and CPU along with its own L3 rather than the NB controller operating that and voltages.

While FX is much improved on Phenom II, the latency drags it well behind Intel. Steamroller is expected to address this further, I think like many AMD users we are vesting our interest in SR now.




 
^^ The latency is a downside to having a global L2 cache, as opposed to per-core L2 (Intel). Its a throughput vs latency problem really. If you had applications that scaled well to multiple cores, then it would make sense from a performance standpoint to have a unified L2 cache.

But again, see where the underlying assumption was incorrect? ALL of BD's performance woes can be tied to the incorrect assumption that applications would scale well to multiple cores with little to no effort, which I again note is not the case.

So I will AGAIN say: Because the underlying assumption behind the architecture was flawed, I can conclude that it will never perform as well as Intel's on a per-application basis.
 
To be perfectly honest AMD let alone users are under no illusions the architecture needs refinement. Apart from the impressive front end seen on Steamroller, the story I am hearing is that each module will have its own unified L2 and a kind of L3 allocation, each core per module with its own resources and FPU, if this is true then the performance will be grossly different.

As to PD, its a case of step forwards as to what its legacy will be at the end, its as to what peoples interest is. My month long adventure trying to squeeze every drop of performance out of a BD has left me tired, frustrated, excited, disappointed, joyful, impressed and many other highs and lows so to be described. It is a very hard architecture to make work as best as it can, but when it does its impressive.
 
AM3+ will probably last until FM3 comes out with ddr4 and such. Then it will be a unified desktop platform for APUs and CPUs (if amd still makes any without a gpu). PCI e3.0 and such can be added with a new chipset if they want, seems like AMD doesn't care much about it. PCI e 2.0 still has plenty of bandwidth so it shouldn't be a problem.
 



Yes, so it means that we can expect the same improvement over BD, without taking into account L3


AMD will keep pushing further step by step, and I think they will best Intel someday ( hope not so far ) even if they trip over at the start of the race as they did with BD
 
AMD won't be able to match intel until at least 2014/2015 where Glofo hopes to catch up on process. Even with the end of the contract between AMD and Glofo, AMD still has nobody else to fab CPUs.

They will just give good performance/ dollar till then and try to push for HSA and APUs. I do imagine AMD is gaining laptop market shares with trinity and will also gain a small slice of tablet shares once Kabini is out.
 
Well there is not much fab improvement left, CMOS is supposed to have it's limit between 8-12 nm.

The next great improvement in CMOS tech will be the implementation of 3D processors, that also should reduce latencies by a wide margin, while also increasing heat density (watercooling will be a MUST), but no tech so far for 3D CPU's
 
Status
Not open for further replies.